Sharp MZ-3500 service manual Memory, Video, Csp, Timer, Clock, Display, Halt SW, Basic, Fdos

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M 7 3500

1. SPECIFICATIONS

1-1. Specification of the main unit (Model 35XX)

 

1) High speed processing usingmulti-CPL'

 

 

 

 

 

2) Built in mini floppy disk

 

 

 

 

 

Outline

3) Built in printer interface and RS232C Aerial interface

 

 

 

4) Connection of up to two video displa, mitt (separate graphic display or overlaid display possible on two individual color

 

 

monitor units)

 

 

 

 

 

 

5) Permits the use of standard CP/M

 

 

 

 

 

Model 3530 incluse a single double-side, double density mini floppy

Model 3531 includes a single double side,

 

disk and 64 KB RAM.

 

 

double density mini floppy disk and 128 KB

 

Model MZ3540 hastwo double-side, density mini floppy disks and

Model 3541 hastwo double side, double

 

64 KB RAM.

 

 

density mini floppy disks, and 128 KB

 

CPU

Multi-CPU processing

Z80A microprocessor x 2

 

 

ROM

IPL

8K Byte ROM

 

 

 

C, G

8K Byte ROM

 

 

 

 

 

 

 

 

For main CPU

64K Bit DRAM x 16 chips or 8 chips

 

MEMORY

RAM

For sub-CPU

16K Bit SRAM x

4 chips

 

 

Shared RAM

16K Bit SRAM x

1 chip

 

 

 

 

 

 

VIDEO

16K B't SRAM x

1 chip

 

 

 

RAM

4K Bit SRAM x

2 chips

 

LSI

 

Memory mapper

TH

SP6102R001

 

 

Custom LSI

Screen controller

CSP-1

SP6102C002

 

 

 

CSP 2

SP6102C003

 

 

 

 

 

 

GDC

CRT controller

MPD7220

 

 

I/O

FDC

Floppy disk controller

pPD765

 

 

 

 

PIO

Parallel I/O port

8255

 

 

 

 

SIO

Serial I/O port

8251

 

 

 

 

TIMER

Counter

8253

 

 

 

 

CLOCK

Clock

/iPD1990AC

 

 

 

Screen structure

80 characters x 25 lines. 80 x 20, 40 x 25. or 40 x 20

 

 

Elements

8 x 16,8x8

 

 

 

 

DISPLAY

Attribute

Reverse, blink, line (horizontal, vertical)

 

 

 

Colors

8 colors on each character and background color

 

 

I/F

2 channels (applicable CRT 640 x 400, 640 x 200, B/W or color)

 

 

One double-side,

 

 

 

 

 

MZ353X

double density

256 bytes/sector, 16 sectors/track, 80 tracks/disk

 

MFD

floppy disk

 

 

 

 

 

Two double-side,

 

 

 

 

 

 

 

 

 

 

 

MZ354X

double density

Built-in interface for optional MFD

 

 

 

floppy disks

 

 

 

 

Light pen

Other I/F

Other functions

Software

Keyboard

Dedicated keyboard

 

 

Printer

Centronics interface

 

 

RS232C

No protocol, asynchronus mode, 110 to 9600 bps, half-duplex

Speaker (500mW)

Battery backup clock

HALT SW

Speaker volume control

 

 

High class compatible with PC3200 BASIC, supplemented and graphic

 

BASIC

control commands

 

FDOS

 

Expanded RS232C, GPIB, and GPIO

Utilities

BACKUP, INIT, COPY, DEBUG, KILLALL

 

Basic CP/M

CP/M Expanded CP/M

Intstruction Manual

Accessories master floppy disk power cord

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Contents Personal Computer Model Z-350 Memory TimerBACKUP, INIT, COPY, DEBUG, Killall VideoLSI, 1C Cmosic Refer to the page TIN Circuit DiagramSlot Slot2 SFDI/FSdisp PresetSymbol Change DispSystem Basic Area RAMBase UserMZ-1D07 MZ3500 System configuration of Model Software Memory Configuration MS1 = D MSO = 0 LTiming of Reset Signal SD1 System Loading & CP/M ROM-IPLMAO Bank SelectFfff Bank SD3 RAM based BasicOperational description ROMBlock diagram Relation between MMR main memory Main Memory MapperTable below describes address map Main CPU and I/O portThis paragraph discusses main CPU I/O MZ3500 0001Main CPU \m Sub CPU and I/O portAddress BUS Memory mapper MMRSP6102R-001 Block diagramTo Reset CoabSrdy MZ3500 Memory mapper MMR SP6102R-001 signal descriptionRAS ROW Address Select Line Address Select Signal Pin No RO2B IN/OUTRO1B D2 Dl 1 1 1 1 1 0 FE do D4 D3 A7 A6 A5A4A3A2AlAO H E X Uhus 1 O1 1 1 1 0 KI1 Dl Do 17 D6 D5 1 1 1 1 1 1 FF 14 I N D3MZ3500 Memory ROMIPL, RAMCOM, S-RAM select circuit Specification CRTSummary of video display specification AsciDot color designated by Dot pitchBlue Graphic dotCH AI +,! AT A r + + G CH ATKA7 #1 FFF Ascii CGVideo RAM Structure of Vram #0000 Structure of character Vram When read/write from GDC#07FFA Read/write by Z-80 via the GDC 640 x 200 dots display mode 8bit16K FV = 60 HzMaster/slave setup by combination 640 x 400 bits display mode FH = 20.92 kHz FV = 47.3 HzSetup of GCD master/slave O signal switchingCrtc block diagram Graphic V-RAM AddressPage Master slice LSI CSP-1 SP6102C 002 signal description CSH CSP-1 Block Diagram» CK LSI CSP-2 SP6012C-003 Signal Description HSY2 2BLK2DSP2 OUT CSP 2 Block Diagram3r00 CAS OUTGDC Graphic display controller UPD7220 signal description AT~BTI AD15ILC2NK-CLC CSR-1MAGECG Address Select Circuit StructureVsync Circuit descriptionCharacter Vram select circuit BlscSet GDC command code Read/write from the Z-80 to V-RAMWrite C 23H Command Code Vecte C 6CH Command Code Return when all parameters were sentCsrw C 49H -COMMAND Code Fifo Empty?VECTE. Dot address is structured on the screen 60HExplanation Following manner Dot display program example-1Kind of line solid line I T E C 23HP4 88H P5 HH Floppy disk OutlineTJ ILJ n VnVn n nV nnn7 Ci D ci IciData MZ3500 MFD interface block diagram FDC UPD765 22 «- o WindowUPD765 signal description Port used in the MFD interface is as follows Trigger motor on of the timer 555 Selects FDDMZ350C MFM recording method3500 Precompensate Circuit Controls during read, write, seek, and re- calibrateMedia detection Control during seek and recalibrationVFO circuit Purpose String of data Pulses from the FDD Data windowVFO circuit configuration Filter Phase Detector Amplifier WindowMFM Mode BQAFM mode timing chart \\\\ 3DSC Side =Aload Track 10 sector 76 iy 7 EH 77 / FFH\128 Indicates the byte position From the top of directory39 B74 B75 Ii PatatB144 6145 B146 B147 39 B148 B149 B150 B151 1015MZS500 General specificationData transmission format Example 7-bits, even parity, 1 stop bitOFF AC controlsStart 8251 AC MZ3500 Data output controlKTS 3SOO RXEN,UTR , T X E N256 2009 6.3 128Wl -» «--N8253 8253 OUTDAT Printer interfacing circuitAA3 DS7Data transfer timing General description of the parallel interfaceOutput I/O port map Write Hold SET Clock circuit SchematicRead Hold DINMZ3500 PD1990AC Block diagram LSB MSBMmmil » GETE1 JGP I/O 3500S I C SFD 1/FSEC SW2 SW1 On on CE332P OFF on MZ1P02 On OFF IO2824 OFF OFFDipswa FD2\f Canbe in either state Description of each block Block diagramFunctions Switching regulator +5VAlarm generation circuit Timing chartKey Specification of keyboard controlAt rrn Key Key search timing2s 2s22 21 StrobeProtocol Key to sub CPU 132.522.5/-s Keyboard controller basic flow PIN Keyboard controller signal descriptionXTAL1 XTAL2 Reset INT ALE DBO DB7 GNDOn OFF Procedure Sub-CPU sideAbnormal Shared RAMCRT inter face test S C I I 00-FFReady O.H Abnormal test ending1 5 c * O DR O.7 ROM-IPL Main CPU Checker Flow Chart 1/2 Main CPU Checker Flow Chart M? 100101 M7*500Keyboard controller ROM test Keyboard testIPL Flow Chart Error Jump \ Boot Address SystemSEEK, Read Error Load Iocs SEEK& ReadSUB CPU IPL Flow Chart 105LJ LJ LJ LJ LJ LJ LJ R R R R F1LU LU U LJ LlJ LJ U U U J l J J L i J L L j l J J L l J L L lRoB IwCAIO MZ-35OO Parts Guide LI S C R I P T I O N No Parts CodeLED PWB IE--or Ooss-zw N T K MZ-3500Parts Code QcnwConnector S C R I P T I O NParts Code MZ-3500NO. Parts Code A a N a DVH S N 7 4 0 6 N NEWCoos Part S C R I P T I O NMark Rank J9, MZ1K02,1K03,1K04,1K05 Key unit M2-3500LA a SOCLSI RAM NO. Parts CodeD e Tin Parts Code N a aMZ-3500 Sharp Corporation
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