Omega OME-PIO-D144 manual Refer to DEMO3.C for source code

Page 11

Example 1: assume initial level=Low, PC0 is used as interrupt source:

Initial=Low

Iniaial_sub()

{ now_int_state=0

_outpd(wBase+0x2a,0)

/*(select the non-inverted signal)*/

ISR_sub()

{

If (now_int_state==0) /* old state=low Æ change to high now */

{

 

 

 

 

now_int_state=1;

/* now int_signal is High

*/

 

/*** application codes are given here ***/

 

 

_outpd(wBase+0x2a,1);

/* select the inverted signal

*/

}

 

 

 

 

else

/* old state=highÆ change to low now

*/

{

 

 

 

 

now_int_state=0;

 

/* now int_signal is Low

 

*/

/*** application codes are given here ***/

_outpd(wBase+0x2a,0);

/* select the non-inverted signal */

}

 

 

 

 

if (wIrq>=8) outp(A2_8259,0x20);

/*

EOI

*/

outp(A1_8259,0x20);

 

/*

EOI

*/

}

Refer to DEMO3.C for source code.

OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001)

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Contents User’sGuide Czech Republic CanadaMexico BeneluxOME-PIO-D144 Table of Contents Demo Program Product Check List SpecificationsAll signals are TTL compatible Board Layout Hardware configuration Refer to DEMO1.C for demo program Enable I/O Operation I/O Port Location O Architecture Make sure the initial level is High or Low If INT signal is Low now Æ select the non-inverted inputInterrupt Operation Refer to DEMO3.C for source code Refer to DEMO4.C for source code CN1PC0 CN1PC1 CN1PC2 CN1PC3 If PC1 is active OME-DB-8125 Daughter BoardsOME-DB-37 OME-DN-37 & OME-DN-50OME-ADP-37/PCI & OME-ADP-50/PCI OME-DB-24P OME-DB-24PD OME-DB-24P/24PD Isolated Input BoardOME-PIO-D144 OME-DB-24R/24RD Relay Board COM OME-DB-24PR OME-DB-24PR/24POR/24COME-DB-24PR Daughter Board Comparison Table GND Pin AssignmentVCC OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 PC’s physical slot information How to Find the I/O AddressResource-allocated information PIO/PISO identification informationOME-PISO-P8R8 OME-PIO-821OME-PISO-P32C32 OME-PISO-P32A32PIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAux PIODriverInitPIOGetConfigAddressSpace ShowPIOPISO Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07 Assignment of I/O AddressOME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Address Read Write RESET\ Control RegisterRESET\ I/O Address MapCN1PC3 CN1PC2 CN1PC1 CN1PC0 AUX Control RegisterAUX data Register INT Mask Control RegisterInterrupt Polarity Control Register Aux Status RegisterActive I/O Port Control Register Read/Write 8-bit data RegisterCN6PC CN6PB CN6PA CN5PC CN5PB CN5PA 9 I/O Selection Control RegisterCN2PC CN2PB CN2PA CN1PC CN1PB CN1PA CN4PC CN4PB CN4PA CN3PC CN3PB CN3PA\TC\LARGE\LIB\PIO.H \TC\LARGE\\TC\LARGE\LIB\ \TC\LARGE\DEMO?\OME-PIO-D144.H Demo1 Use D/O of CN1 CN3 CN4 Demo2 Use D/O of CN1~CN6 PA/PB/PC COUNT=0 Demo3 Interrupt demo1Refer to Sec .5.1 for more information Demo4 Interrupt demo2 Refer to Sec .5.2 for more information Demo5 Interrupt demo3 CN1PC1 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo 6 Outport of CN1-CN6 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo10 Find Card Number OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 WARRANTY/DISCLAIMER Temperature