Omega OME-PIO-D144 manual Read/Write 8-bit data Register, Active I/O Port Control Register

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3.3.7Read/Write 8-bit data Register

(Read/Write): wBase+0xc0

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

D7

D6

D5

D4

D3

D2

D1

D0

Note. Refer to Sec. 3.1 for more information about wBase.

There are eighteen 8-bit I/O port in the OME-PIO-D144. Every I/O port can be programmed as D/I or D/O port. Refer to Sec. 3.3.9 for D/I or D/O selection. When the PC is first power-on, all eighteen ports are used as D/I port.

outp(wBase+0xc0,Val);

/* write to D/O port */

Val=inp(wBase+0xc0);

/* read from D/I port */

3.3.8Active I/O Port Control Register

(Read/Write): wBase+0xc4

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

D7

D6

D5

D4

D3

D2

D1

D0

Note. Refer to Sec. 3.1 for more information about wBase.

There are eighteen 8-bit I/O port in the OME-PIO-D144. Only one I/O port can be active at the same time.

outp(wBase+0xc4,0);

/*

I/O port_0 is active now

*/

outp(wBase+0xc4,1);

/*

I/O port_1 is active now

*/

outp(wBase+0xc4,17);

/*

I/O port_17 is active now */

Refer to Sec. 2.2 for I/O port location.

OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001)

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Contents User’sGuide Mexico CanadaBenelux Czech RepublicOME-PIO-D144 Table of Contents Demo Program Specifications All signals are TTL compatibleProduct Check List Board Layout Hardware configurationEnable I/O Operation I/O Port LocationRefer to DEMO1.C for demo program O Architecture If INT signal is Low now Æ select the non-inverted input Interrupt OperationMake sure the initial level is High or Low Refer to DEMO3.C for source code Refer to DEMO4.C for source code CN1PC0 CN1PC1 CN1PC2 CN1PC3 If PC1 is active OME-DB-37 Daughter BoardsOME-DN-37 & OME-DN-50 OME-DB-8125OME-ADP-37/PCI & OME-ADP-50/PCI OME-DB-24P/24PD Isolated Input Board OME-PIO-D144OME-DB-24P OME-DB-24PD OME-DB-24R/24RD Relay Board OME-DB-24PR/24POR/24C OME-DB-24PRCOM OME-DB-24PR Daughter Board Comparison Table Pin Assignment VCCGND OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Resource-allocated information How to Find the I/O AddressPIO/PISO identification information PC’s physical slot informationOME-PISO-P32C32 OME-PIO-821OME-PISO-P32A32 OME-PISO-P8R8PIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAux PIODriverInitPIOGetConfigAddressSpace ShowPIOPISO Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07 Assignment of I/O AddressOME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 RESET\ RESET\ Control RegisterI/O Address Map Address Read WriteAUX data Register AUX Control RegisterINT Mask Control Register CN1PC3 CN1PC2 CN1PC1 CN1PC0Interrupt Polarity Control Register Aux Status RegisterActive I/O Port Control Register Read/Write 8-bit data RegisterCN2PC CN2PB CN2PA CN1PC CN1PB CN1PA 9 I/O Selection Control RegisterCN4PC CN4PB CN4PA CN3PC CN3PB CN3PA CN6PC CN6PB CN6PA CN5PC CN5PB CN5PA\TC\LARGE\LIB\ \TC\LARGE\\TC\LARGE\DEMO?\ \TC\LARGE\LIB\PIO.HOME-PIO-D144.H Demo1 Use D/O of CN1 CN3 CN4 Demo2 Use D/O of CN1~CN6 PA/PB/PC COUNT=0 Demo3 Interrupt demo1Refer to Sec .5.1 for more information Demo4 Interrupt demo2 Refer to Sec .5.2 for more information Demo5 Interrupt demo3 CN1PC1 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo 6 Outport of CN1-CN6 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo10 Find Card Number OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 WARRANTY/DISCLAIMER Temperature