Omega OME-PIO-D144 manual O Architecture

2.4	D/I/O Architecture
I/O select (Sec. 3.3.9)
	RESET\ (Sec. 3.3.1)	D/I/O
	disable\
	Data	Latch
	input
	(Sec. 3.3.7)
	Clock input
	D/O latch CKT
	disable
	Data	input
	Buffer
	(Sec. 3.3.7)
	Clock input
	D/I buffer CKT

•The RESET\ is in Low-state Æ all D/I/O operation is disable

•The RESET\ is in High-state Æ all D/I/O operation is enable.

•If D/I/O is configured as D/I port Æ D/I=external input signal

•If D/I/O is configured as D/O port Æ D/I = read back of D/O

•If D/I/O is configured as D/I port Æ send to D/O will change the D/O latch register only. The D/I & external input signal will not change.

OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001) ----- 7