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Table of Contents
1. | INTRODUCTION | 4 | |
| 1.1 | SPECIFICATIONS | 4 |
| 1.2 | PRODUCT CHECK LIST | 4 |
2. | HARDWARE CONFIGURATION | 5 | |
| 2.1 | BOARD LAYOUT | 5 |
| 2.2 | I/O PORT LOCATION | 6 |
| 2.3 | ENABLE I/O OPERATION | 6 |
| 2.4 | D/I/O ARCHITECTURE | 7 |
| 2.5 | INTERRUPT OPERATION | 8 |
| 2.6 | DAUGHTER BOARDS | 13 |
| 2.6.1 | 13 | |
| 2.6.2 | 13 | |
| 2.6.3 | 13 | |
| 2.6.4 | 14 | |
| 2.6.5 | 15 | |
| 2.6.6 | 16 | |
| 2.6.7 | 17 | |
| 2.6.8 | Daughter Board Comparison Table | 18 |
| 2.7 | PIN ASSIGNMENT | 19 |
3. | I/O CONTROL REGISTER | 21 | |
| 3.1 | HOW TO FIND THE I/O ADDRESS | 21 |
| 3.1.1 | PIO_DriverInit | 23 |
| 3.1.2 | PIO_GetConfigAddressSpace | 24 |
| 3.1.3 Show_PIO_PISO | 25 | |
| 3.2 | THE ASSIGNMENT OF I/O ADDRESS | 26 |
| 3.3 | THE I/O ADDRESS MAP | 28 |
| 3.3.1 | RESET\ Control Register | 28 |
| 3.3.2 | AUX Control Register | 29 |
| 3.3.3 | AUX data Register | 29 |
| 3.3.4 | INT Mask Control Register | 29 |
| 3.3.5 | Aux Status Register | 30 |
| 3.3.6 | Interrupt Polarity Control Register | 30 |
| 3.3.7 | Read/Write | 31 |
| 3.3.8 | Active I/O Port Control Register | 31 |
| 3.3.9 | I/O Selection Control Register | 32 |