Omega OME-PIO-D144 manual Aux Status Register, Interrupt Polarity Control Register

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3.3.5Aux Status Register

(Read/Write): wBase+7

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Aux7

Aux6

Aux5

Aux4

Aux3

Aux2

Aux1

Aux0

Note. Refer to Sec. 3.1 for more information about wBase.

Aux0=CN_PC0, Aux1=CN1_PC1, Aux2=CN1_PC2, CN1_Aux3=PC3, Aux7~4=Aux-ID. Refer to DEMO5.C for more information. The Aux0~3 are used as interrupt source. The interrupt service routine has to read this register for interrupt source identification. Refer to Sec. 2.5 for more information.

3.3.6Interrupt Polarity Control Register

(Read/Write): wBase+0x2A

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0

0

0

0

CN1_PC3

CN1_PC2

CN1_PC1

CN1_PC0

Note. Refer to Sec. 3.1 for more information about wBase.

For Example:

CN1_PC0=0Æ select the non-inverted signal from PC0 of CN1_PC. CN1_PC0=1Æ select the inverted signal from PC0 of CN1_PC.

outp(wBase+0x2a,0x0f);

/* select the non-inverted input CN1_PC0/1/2/3 */

outp(wBase+0x2a,0);

/* select the inverted input of CN1_PC0/1/2/3

*/

outp(wBase+0x2a,0x0e);

/* select the inverted input of CN1_PC0

*/

/* select the non-inverted input CN1_PC1/2/3

*/

outp(wBase+0x2a,0x03);

/* select the inverted input of CN1_PC0/1

*/

/* select the non-inverted input CN1_PC2/3

*/

Refer to Sec. 2.5 for more information.

Refer to DEMO5.C for more information.

OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001)

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Contents User’sGuide Canada MexicoBenelux Czech RepublicOME-PIO-D144 Table of Contents Demo Program Product Check List SpecificationsAll signals are TTL compatible Hardware configuration Board LayoutRefer to DEMO1.C for demo program Enable I/O OperationI/O Port Location O Architecture Make sure the initial level is High or Low If INT signal is Low now Æ select the non-inverted inputInterrupt Operation Refer to DEMO3.C for source code Refer to DEMO4.C for source code CN1PC0 CN1PC1 CN1PC2 CN1PC3 If PC1 is active Daughter Boards OME-DB-37OME-DN-37 & OME-DN-50 OME-DB-8125OME-ADP-37/PCI & OME-ADP-50/PCI OME-DB-24P OME-DB-24PD OME-DB-24P/24PD Isolated Input BoardOME-PIO-D144 OME-DB-24R/24RD Relay Board COM OME-DB-24PR OME-DB-24PR/24POR/24COME-DB-24PR Daughter Board Comparison Table GND Pin AssignmentVCC OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 How to Find the I/O Address Resource-allocated informationPIO/PISO identification information PC’s physical slot informationOME-PIO-821 OME-PISO-P32C32OME-PISO-P32A32 OME-PISO-P8R8PIODriverInit PIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAuxPIOGetConfigAddressSpace ShowPIOPISO Assignment of I/O Address Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 RESET\ Control Register RESET\I/O Address Map Address Read WriteAUX Control Register AUX data RegisterINT Mask Control Register CN1PC3 CN1PC2 CN1PC1 CN1PC0Aux Status Register Interrupt Polarity Control RegisterRead/Write 8-bit data Register Active I/O Port Control Register9 I/O Selection Control Register CN2PC CN2PB CN2PA CN1PC CN1PB CN1PACN4PC CN4PB CN4PA CN3PC CN3PB CN3PA CN6PC CN6PB CN6PA CN5PC CN5PB CN5PA\TC\LARGE\ \TC\LARGE\LIB\\TC\LARGE\DEMO?\ \TC\LARGE\LIB\PIO.HOME-PIO-D144.H Demo1 Use D/O of CN1 CN3 CN4 Demo2 Use D/O of CN1~CN6 PA/PB/PC Demo3 Interrupt demo1 COUNT=0Refer to Sec .5.1 for more information Demo4 Interrupt demo2 Refer to Sec .5.2 for more information Demo5 Interrupt demo3 CN1PC1 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo 6 Outport of CN1-CN6 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo10 Find Card Number OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 WARRANTY/DISCLAIMER Temperature