3.3.5Aux Status Register
(Read/Write): wBase+7
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
Aux7 | Aux6 | Aux5 | Aux4 | Aux3 | Aux2 | Aux1 | Aux0 |
Note. Refer to Sec. 3.1 for more information about wBase.
Aux0=CN_PC0, Aux1=CN1_PC1, Aux2=CN1_PC2, CN1_Aux3=PC3,
3.3.6Interrupt Polarity Control Register
(Read/Write): wBase+0x2A
Bit 7 | Bit 6 | Bit 5 | Bit 4 | Bit 3 | Bit 2 | Bit 1 | Bit 0 |
0 | 0 | 0 | 0 | CN1_PC3 | CN1_PC2 | CN1_PC1 | CN1_PC0 |
Note. Refer to Sec. 3.1 for more information about wBase.
For Example:
CN1_PC0=0Æ select the
outp(wBase+0x2a,0x0f); | /* select the | |
outp(wBase+0x2a,0); | /* select the inverted input of CN1_PC0/1/2/3 | */ |
outp(wBase+0x2a,0x0e); | /* select the inverted input of CN1_PC0 | */ |
/* select the | */ | |
outp(wBase+0x2a,0x03); | /* select the inverted input of CN1_PC0/1 | */ |
/* select the | */ |
Refer to Sec. 2.5 for more information.
Refer to DEMO5.C for more information.
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