Omega OME-PIO-D144 manual CN3 CN4

Page 38

outp(wBase+0xcc,0x00);

/*

CN3

to

CN4

port

are

all

output

*/

outp(wBase+0xd0,0x00);

/*

CN5

to

CN6

port

are

all

output

*/

for (;;)

{

printf("\nCN1 : PA=0x55, PB=0xAA, PC=0x5A, press Q to stop");

outp(wBase+0xc4,0); /* select CN1_PA */ outp(wBase+0xc0,0x55); /* set CN1_PA=0x55 */

outp(wBase+0xc4,1);

/* select CN1_PB

*/

outp(wBase+0xc0,0xaa);

/* set CN1_PB=0xaa */

outp(wBase+0xc4,2);

/* select CN1_PC

*/

outp(wBase+0xc0,0x5a);

/* set CN1_PC=0x5a */

c=getch(); if ((c=='Q')

(c=='q')) break;

 

printf("\nCN1 : PA=0xAA, PB=0x55, PC=0xA5, press Q to stop");

outp(wBase+0xc4,0); /* select CN1_PA */ outp(wBase+0xc0,0xAA); /* set CN1_PA=0xAA */

outp(wBase+0xc4,1);

/* select CN1_PB

*/

outp(wBase+0xc0,0x55);

/* set CN1_PB=0x55 */

outp(wBase+0xc4,2);

/* select CN1_PC

*/

outp(wBase+0xc0,0xa5);

/* set CN1_PC=0xA5

*/

c=getch(); if ((c=='Q') (c=='q')) break;

}

PIO_DriverClose();

}

OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001)

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Contents User’sGuide Benelux CanadaMexico Czech RepublicOME-PIO-D144 Table of Contents Demo Program Product Check List SpecificationsAll signals are TTL compatible Hardware configuration Board LayoutRefer to DEMO1.C for demo program Enable I/O OperationI/O Port Location O Architecture Make sure the initial level is High or Low If INT signal is Low now Æ select the non-inverted inputInterrupt Operation Refer to DEMO3.C for source code Refer to DEMO4.C for source code CN1PC0 CN1PC1 CN1PC2 CN1PC3 If PC1 is active OME-DN-37 & OME-DN-50 Daughter BoardsOME-DB-37 OME-DB-8125OME-ADP-37/PCI & OME-ADP-50/PCI OME-DB-24P OME-DB-24PD OME-DB-24P/24PD Isolated Input BoardOME-PIO-D144 OME-DB-24R/24RD Relay Board COM OME-DB-24PR OME-DB-24PR/24POR/24COME-DB-24PR Daughter Board Comparison Table GND Pin AssignmentVCC OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 PIO/PISO identification information How to Find the I/O AddressResource-allocated information PC’s physical slot informationOME-PISO-P32A32 OME-PIO-821OME-PISO-P32C32 OME-PISO-P8R8PIODriverInit PIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAuxPIOGetConfigAddressSpace ShowPIOPISO Assignment of I/O Address Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 I/O Address Map RESET\ Control RegisterRESET\ Address Read WriteINT Mask Control Register AUX Control RegisterAUX data Register CN1PC3 CN1PC2 CN1PC1 CN1PC0Aux Status Register Interrupt Polarity Control RegisterRead/Write 8-bit data Register Active I/O Port Control RegisterCN4PC CN4PB CN4PA CN3PC CN3PB CN3PA 9 I/O Selection Control RegisterCN2PC CN2PB CN2PA CN1PC CN1PB CN1PA CN6PC CN6PB CN6PA CN5PC CN5PB CN5PA\TC\LARGE\DEMO?\ \TC\LARGE\\TC\LARGE\LIB\ \TC\LARGE\LIB\PIO.HOME-PIO-D144.H Demo1 Use D/O of CN1 CN3 CN4 Demo2 Use D/O of CN1~CN6 PA/PB/PC Demo3 Interrupt demo1 COUNT=0Refer to Sec .5.1 for more information Demo4 Interrupt demo2 Refer to Sec .5.2 for more information Demo5 Interrupt demo3 CN1PC1 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo 6 Outport of CN1-CN6 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo10 Find Card Number OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 WARRANTY/DISCLAIMER Temperature