Omega OME-PIO-D144 manual Refer to Sec .5.2 for more information

Page 44

outp(wBase+5,0);

/* disable all interrupt */

 

PIO_DriverClose();

 

 

}

 

 

/* ------------------------------------------------------------

*/

/* Use PC0 as external interrupt signal

*/

WORD init_high()

 

 

{

 

 

DWORD dwVal;

 

 

disable();

 

 

outp(wBase+5,0);

/* disable all interrupt */

 

if (wIrq<8)

 

 

{

 

 

irqmask=inp(A1_8259+1);

 

outp(A1_8259+1,irqmask & (0xff ^ (1 << wIrq)));

 

setvect(wIrq+8, irq_service);

 

}

 

 

else

 

 

{

 

 

irqmask=inp(A1_8259+1);

/* IRQ2 */

outp(A1_8259+1,irqmask & 0xfb);

outp(A1_8259+1,irqmask & (0xff ^ (1 << wIrq)));

 

irqmask=inp(A2_8259+1);

 

 

outp(A2_8259+1,irqmask & (0xff ^ (1 << (wIrq-8))));

setvect(wIrq-8+0x70, irq_service);

 

 

}

 

 

 

outp(wBase+5,1);

/* enable interrupt

 

*/

now_int_state=1;

/* now int_signal is low

*/

outp(wBase+0x2a,1);

/* select the inverte input */

enable();

 

 

 

}

 

 

 

void interrupt irq_service()

 

 

{

 

 

 

if (now_int_state==0)

 

 

 

{

/* find a high_pulse here

*/

outp(wBase+0x2a,1);

/* select the inverte input */

now_int_state=1;

/* now int_signal is High

*/

}

 

 

 

else

 

 

 

{

/* find a low_pulse

 

*/

COUNT++;

 

outp(wBase+0x2a,0);

/* select the non-inverte input */

now_int_state=0;

/* now int_signal is High

*/

}

 

 

 

if (wIrq>=8) outp(A2_8259,0x20); outp(A1_8259,0x20);

}

Refer to Sec. 2.5.2 for more information.

OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001)

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Image 44
Contents User’sGuide Canada MexicoBenelux Czech RepublicOME-PIO-D144 Table of Contents Demo Program Product Check List SpecificationsAll signals are TTL compatible Hardware configuration Board LayoutRefer to DEMO1.C for demo program Enable I/O OperationI/O Port Location O Architecture Make sure the initial level is High or Low If INT signal is Low now Æ select the non-inverted inputInterrupt Operation Refer to DEMO3.C for source code Refer to DEMO4.C for source code CN1PC0 CN1PC1 CN1PC2 CN1PC3 If PC1 is active Daughter Boards OME-DB-37OME-DN-37 & OME-DN-50 OME-DB-8125OME-ADP-37/PCI & OME-ADP-50/PCI OME-DB-24P OME-DB-24PD OME-DB-24P/24PD Isolated Input BoardOME-PIO-D144 OME-DB-24R/24RD Relay Board COM OME-DB-24PR OME-DB-24PR/24POR/24COME-DB-24PR Daughter Board Comparison Table GND Pin AssignmentVCC OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 How to Find the I/O Address Resource-allocated informationPIO/PISO identification information PC’s physical slot informationOME-PIO-821 OME-PISO-P32C32OME-PISO-P32A32 OME-PISO-P8R8PIODriverInit PIODriverInit&wBoards, wSubVendor,wSubDevice,wSubAuxPIOGetConfigAddressSpace ShowPIOPISO Assignment of I/O Address Slot5 0x0A Slot6 0x08 Slot7 0x09 Slot8 0x07OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 RESET\ Control Register RESET\I/O Address Map Address Read WriteAUX Control Register AUX data RegisterINT Mask Control Register CN1PC3 CN1PC2 CN1PC1 CN1PC0Aux Status Register Interrupt Polarity Control RegisterRead/Write 8-bit data Register Active I/O Port Control Register9 I/O Selection Control Register CN2PC CN2PB CN2PA CN1PC CN1PB CN1PACN4PC CN4PB CN4PA CN3PC CN3PB CN3PA CN6PC CN6PB CN6PA CN5PC CN5PB CN5PA\TC\LARGE\ \TC\LARGE\LIB\\TC\LARGE\DEMO?\ \TC\LARGE\LIB\PIO.HOME-PIO-D144.H Demo1 Use D/O of CN1 CN3 CN4 Demo2 Use D/O of CN1~CN6 PA/PB/PC Demo3 Interrupt demo1 COUNT=0Refer to Sec .5.1 for more information Demo4 Interrupt demo2 Refer to Sec .5.2 for more information Demo5 Interrupt demo3 CN1PC1 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo 6 Outport of CN1-CN6 OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 Demo10 Find Card Number OME-PIO-D144 User’s Manual Ver.2.1, Sep/2001 WARRANTY/DISCLAIMER Temperature