Multi-Tech Systems RAS96 manual E1 Facility Termination, Pin Signal

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5 E1 Daughter Card

E1 Facility Termination

The E1 facility termination typically enters the customer’s premises as two wire pairs for data. Figure 5 shows the RJ-48C connector, and Table 2 shows its pin configuration.

Figure 5. RJ-48C connector.

Table 2. RJ-48C Pin Configuration

Pin Signal

1Tip 1 (Receive from network)

2Ring 1 (Receive from network) 3, 6 No Connection

4(Transmit to network)

5(Transmit to network) 7, 8 No connection

CommPlete Communications Server

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Contents RAS96 RASCard E1 User Guide RAS96 RASCard User Guide Iii Important Safety InstructionsTable of Contents Appendix C Post Codes Solving ProblemsPage Introduction Manual Organization IntroductionAppendix B Post Messages Technical SpecificationsAppendix C Post Codes Appendix D Approved MemoryHumidity range 20-90% noncondensing RASCard Description RAS96 RASCard Memory BanksJ14, J15, J16, J18 CPU Frequency Selection J17 Watchdog TimerJumpers Internal Connectors J2 Power Connector External ConnectorsJ22 E1 Alarm J35 VideoFront Panel LED IndicatorsEthernet Status LEDs E1 Status LEDsReset Switch SwitchesPower Switch Page Installation Installation Procedure Safety WarningsPre-Installation Notes Installation Page Bios Setup Utility Starting Setup Getting Help Using SetupCase of Problems Bios Features Setup Standard Cmos SetupChipset Features Setup Power Management SetupLoad Bios Defaults PCI Configuration SetupPassword Setting IDE HDD Auto Detection Load Setup DefaultsExit Without Saving Save and Exit SetupDate Standard Cmos SetupTime Hard DisksCGA Drive a Type / Drive B TypeVideo Memory Halt OnEnabled Bios Features SetupDisabled Virus WarningBoot Sequence Quick Power On Self TestBoot Up Floppy Seek Boot Up NumLock StatusGate A20 Option Typematic Rate SettingMemory Parity Check Typematic Rate Chars/SecVideo Bios Shadow Typematic Delay MsecSecurity Option C8000 Cffff Shadow/DC000 Dffff ShadowDram Timing Chipset Features SetupSystem Bios Cacheable Bit I/O Recovery Time Video Bios CacheableIDE HDD Block Mode Memory Hole At 15M-16MPCI Concurrancy On-Chip Primary PCI IDEPCI Streaming PCI BurstingPower Management Power Management SetupStandby Mode Doze ModeSuspend Mode HDD Power DownCOM Ports Accessed Power Down ActivitiesLPT Ports Accessed Drive Ports Accessed1st/2nd/3rd/4th Available IRQ PCI Configuration SetupSlot x Using INT# PCI IDE IRQ Map to PCI IRQ Activated byEnter Password Password SettingPage E1 Daughter Cards E1 Overview SpecificationsE1 Glossary E1 Basics E1 Frame Formats Signaling OptionsE1 Line Coding Dnis digitsCountry Selection E1 Facility Termination Pin SignalPCB Description RJ-11 Alarm JackE1 Line Monitoring Jack Test ModesOrdering an E1 Line Configuration of the E1 Daughter CardChannelized E1 line with 30 DS-0 channels E1 Frame Format Line CodingFactory Defaults To Configure the E1 Daughter CardCommand Example E1 CommandsRAS96 RASCard User Guide E1 Daughter Card RAS96 RASCard User Guide E1 Status LEDs E1 Command MessagesFunctional Description Solving Problems RASCard has no video TroubleshootingKeyboard does not respond to key strokes Invalid time, date or setupCOM1 port does not respond correctly Memory Upgrade Calling Technical Support Diagnostic TestsRAS96 RASCard User Guide Appendixes Video Connector J35 Appendix a Connector PinoutsKeyboard Connector J11 E1 Alarm Connector J22 COM1 Connector J3Drive Power Connector J13 Pin Floppy Disk Drive Connector J27IOCS16 Hard Disk Connector J6Figure A-7. IDE connector IDE Connector J21Post Beep Error MessagesAppendix B Post Messages Memory Verify Error at Memory Address Error atMemory parity Error at Offending Segment Code Name Description Appendix C Post CodesPost Codes E1-EF Capacity Speed Type Manufacturer Part Number Usable MB Appendix D Approved MemoryAppendix E Regulatory Information EMC, Safety and Terminal Directive Compliance