Cypress CYV15G0104TRB manual Ordering Information, Package Diagram, Speed Ordering Code

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CYV15G0104TRB

Ordering Information

Speed

Ordering Code

Package

Package Type

Operating

Name

Range

Standard

CYV15G0104TRB-BGC

BL256

256-Ball Thermally Enhanced Ball Grid Array

Commercial

Standard

CYV15G0104TRB-BGXC

BL256

Pb-Free 256-Ball Thermally Enhanced Ball Grid Array

Commercial

Package Diagram

256-Lead L2 Ball Grid Array (27 x 27 x 1.57 mm) BL256

51-85123-*E

HOTLink is a registered trademark and HOTLink II is a trademark of Cypress Semiconductor. All product and company names mentioned in this document may be the trademarks of their respective holders.

Document #: 38-02100 Rev. *B

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Contents Receive RX channel of the CYV15G0104TRB HOTLink FeaturesFunctional Description North First Street San Jose, CA Document # 38-02100 Rev. *BROUTA1 ± ROUTA2 ± TOUTB1 ± TOUTB2 ±Device Configuration and Control Block Diagram Reclocking Deserializer Path Block DiagramSerializer Path Block Diagram JtagPin Configuration Top View1 Pin Configuration Bottom View1 20 19 18 17 16Transmit Path Clock Signals Receive Path Data and Status SignalsDevice Control Signals Name Characteristics Signal DescriptionReceive Path Clock Signals Signal Detect Amplitude Select Device Configuration and Control Bus SignalsInternal Device Configuration Latches Receive Channel Power ControlCYV15G0104TRB HOTLink II Operation CYV15G0104TRB Transmit Data PathSpdselb Txrateb CYV15G0104TRB Receive Data PathREFCLKB± Sdasela Signal Detect/Link FaultClock/Data Recovery TRGCLKA±Reclocker Serial Output Drivers Power ControlReclocker Output BusLatch Types Device Configuration and Control InterfaceDevice Reset State Static Latch ValuesReset sampled LOW disables all output drivers Disables all output driversTransmit Bist function is enabled Phase Alignment Buffer Document # 38-02100 Rev. *BBISTSTA, RXDA0, RXDA1 Jtag SupportJtag ID Bistdatacompare 000 BisterrorBiststart BISTSTA, RXDA0, RXDA1 = Bistwait BistlastbadOperating Range CYV15G0104TRB DC Electrical CharacteristicsMaximum Ratings CYV15G0104TRB AC Electrical Characteristics AC Test Loads and WaveformsTxrateb = 1, Txckselb = Parameter Description Min Max UnitTxrateb = 0, Txckselb = TXRATEB= 0, Txckselb =PLL Characteristics CYV15G0104TRB Reclocker Output PLL CharacteristicsParameter Description Test Conditions Max Unit CYV15G0104TRB HOTLink II Transmitter Switching WaveformsCapacitance Transmit Interface Write Timing Txclkb selectedRxratea = Txrate =Txrateb = Bus Configuration Write Timing No Connect VCC PowerReset Lvttl in PU GND GroundRXCLKA+ Lvttl OUT TXDB2 LvttlTXDB9 Lvttl Repdoa Lvttl OUTSpeed Ordering Code Package DiagramOrdering Information Package Type Operating Name RangeFRE REV ECN no Issue ORIG. Description of Change DateDocument History SUA