Cypress CY7C1312AV18, CY7C1314AV18, CY7C1310AV18 manual Pin Configurations, Vss, Tms Tdi

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CY7C1310AV18

CY7C1312AV18

PRELIMINARYCY7C1314AV18

Pin Configurations

CY7C1310AV18 (2M × 8) – 11 × 15 BGA

1

2

3

4

5

6

7

8

9

10

11

A

VSS/72M

A

1

NC/144M

A

VSS/36M

CQ

WPS

BWS

K

RPS

CQ

B

NC

A

NC/288M

K

0

A

NC

Q3

BWS

C

NC

VSS

A

VSS

NC

D3

D

NC

D4

NC

VSS

NC

E

NC

Q4

VDDQ

VSS

VDDQ

NC

D2

Q2

F

NC

VDDQ

VDD

VSS

VDD

VDDQ

NC

G

NC

D5

Q5

VDDQ

VDD

VSS

VDD

VDDQ

NC

H

VREF

VDDQ

VDD

VSS

VDD

VDDQ

VREF

ZQ

DOFF

J

NC

VDDQ

VDD

VSS

VDD

VDDQ

NC

Q1

D1

K

NC

VDDQ

VDD

VSS

VDD

VDDQ

NC

L

NC

Q6

D6

VDDQ

VSS

VDDQ

NC

Q0

M

NC

VSS

NC

D0

N

NC

D7

NC

VSS

A

VSS

NC

P

NC

Q7

A

C

A

NC

R

TDO

TCK

A

TMS

TDI

C

CY7C1312AV18 (1M × 18) – 11 × 15 BGA

1

2

3

4

5

6

7

8

9

10

11

A

VSS/144M

NC/36M

NC/288M

A

VSS/72M

CQ

WPS

BWS

1

K

RPS

B

NC

Q9

D9

A

NC

K

BWS

0

A

NC

Q8

C

NC

D10

VSS

A

VSS

NC

Q7

D8

D

NC

D11

Q10

VSS

NC

D7

E

NC

Q11

VDDQ

VSS

VDDQ

NC

D6

Q6

F

NC

Q12

D12

VDDQ

VDD

VSS

VDD

VDDQ

NC

Q5

G

NC

D13

Q13

VDDQ

VDD

VSS

VDD

VDDQ

NC

D5

H

VREF

VDDQ

VDD

VSS

VDD

VDDQ

VREF

ZQ

DOFF

J

NC

D14

VDDQ

VDD

VSS

VDD

VDDQ

NC

Q4

D4

K

NC

Q14

VDDQ

VDD

VSS

VDD

VDDQ

NC

D3

Q3

L

NC

Q15

D15

VDDQ

VSS

VDDQ

NC

Q2

M

NC

D16

VSS

NC

Q1

D2

N

NC

D17

Q16

VSS

A

VSS

NC

D1

P

NC

Q17

A

C

A

NC

D0

Q0

R

TDO

TCK

A

TMS

TDI

C

Document #: 38-05497 Rev. *A

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Contents Functional Description FeaturesConfigurations Logic Block Diagram CY7C1310AV18167 MHz 133 MHz Unit Logic Block Diagram CY7C1312AV18Logic Block Diagram CY7C1314AV18 Selection GuidePin Configurations VSSTMS TDI WPS Pin DefinitionsPin Name Pin Description OperationsTDO for Jtag Negative Output Clock InputNegative Input Clock Input Is referenced with respect toIntroduction Application Example1 DLLRPS WPS Write Cycle Descriptions CY7C1314AV18 2 BWSComments Operating Range DC Electrical Characteristics Over the Operating Range9,14AC Electrical Characteristics Over the Operating Range Maximum RatingsThermal Resistance20 Switching Characteristics Over the Operating Range 16,17Input Capacitance TA = 25C, f = 1 MHz VDD = Capacitance20AC Test Loads and Waveforms Parameter Description Test Conditions Max UnitRead/Write/Deselect Sequence PreliminaryIdcode Ieee 1149.1 Serial Boundary Scan JtagExtest Sample ZSAMPLE/PRELOAD BypassEXIT2-IR UPDATE-DR UPDATE-IR TAP Controller State Diagram24Parameter Description Test Conditions Min Max Unit TAP Controller Block DiagramTAP AC Switching Characteristics Over the Operating Range26 TAP Timing and Test Conditions27Parameter Description Min Max Unit Boundary Scan Order Identification Register DefinitionsScan Register Sizes Instruction Codes10F Ordering Information Package DiagramVBL Document HistoryREV DIM