Cypress CY7C1310AV18, CY7C1312AV18 TAP AC Switching Characteristics Over the Operating Range26

Page 17

 

CY7C1310AV18

PRELIMINARY

CY7C1312AV18

CY7C1314AV18

 

 

TAP AC Switching Characteristics Over the Operating Range[26, 27]

Parameter

Description

Min.

Max.

Unit

tTCYC

TCK Clock Cycle Time

100

 

ns

tTF

TCK Clock Frequency

 

10

MHz

tTH

TCK Clock HIGH

40

 

ns

tTL

TCK Clock LOW

40

 

ns

Set-up Times

 

 

 

 

 

 

 

 

 

tTMSS

TMS Set-up to TCK Clock Rise

10

 

ns

tTDIS

TDI Set-up to TCK Clock Rise

10

 

ns

tCS

Capture Set-up to TCK Rise

10

 

ns

Hold Times

 

 

 

 

tTMSH

TMS Hold after TCK Clock Rise

10

 

ns

tTDIH

TDI Hold after Clock Rise

10

 

ns

tCH

Capture Hold after Clock Rise

10

 

ns

Output Times

 

 

 

 

 

 

 

 

 

tTDOV

TCK Clock LOW to TDO Valid

 

20

ns

tTDOX

TCK Clock LOW to TDO Invalid

0

 

ns

TAP Timing and Test Conditions[27]

 

 

 

0.9V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

50

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Z0

= 50

 

 

 

 

 

 

 

CL = 20 pF

 

 

 

0V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

tTH

 

 

 

 

 

(a)

ALL INPUT PULSES

1.8V

0.9V

tTL

Test Clock

TCK

Test Mode Select

TMS

Test Data-In

TDI

Test Data-Out

TDO

tTMSS

tTDIS

tTMSH

tTDIH

tTDOV

tTCYC

tTDOX

26.tCS and tCH refer to the set-up and hold time requirements of latching data from the boundary scan register.

27.Test conditions are specified using the load in TAP AC test conditions. tR/tF = 1 ns.

Document #: 38-05497 Rev. *A

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Contents Configurations FeaturesLogic Block Diagram CY7C1310AV18 Functional DescriptionLogic Block Diagram CY7C1314AV18 Logic Block Diagram CY7C1312AV18Selection Guide 167 MHz 133 MHz UnitTMS TDI Pin ConfigurationsVSS Pin Name Pin Description Pin DefinitionsOperations WPSNegative Input Clock Input Negative Output Clock InputIs referenced with respect to TDO for JtagIntroduction RPS WPS Application Example1DLL Comments Write Cycle Descriptions CY7C1314AV18 2BWS AC Electrical Characteristics Over the Operating Range DC Electrical Characteristics Over the Operating Range9,14Maximum Ratings Operating RangeThermal Resistance20 Switching Characteristics Over the Operating Range 16,17AC Test Loads and Waveforms Capacitance20Parameter Description Test Conditions Max Unit Input Capacitance TA = 25C, f = 1 MHz VDD =Read/Write/Deselect Sequence PreliminaryIdcode Ieee 1149.1 Serial Boundary Scan JtagSAMPLE/PRELOAD Sample ZBypass ExtestEXIT2-IR UPDATE-DR UPDATE-IR TAP Controller State Diagram24Parameter Description Test Conditions Min Max Unit TAP Controller Block DiagramParameter Description Min Max Unit TAP AC Switching Characteristics Over the Operating Range26TAP Timing and Test Conditions27 Scan Register Sizes Identification Register DefinitionsInstruction Codes Boundary Scan Order10F Ordering Information Package DiagramREV Document HistoryDIM VBL