Cypress CY7C1312AV18, CY7C1314AV18, CY7C1310AV18 manual Maximum Ratings, Operating Range

CY7C1310AV18

CY7C1312AV18

PRELIMINARYCY7C1314AV18

Maximum Ratings

(Above which useful life may be impaired.)
Storage Temperature		–65°C to +150°C
Ambient Temperature with
Power Applied		–55°C to +125°C
Supply Voltage on VDD Relative to GND		–0.5V to +2.9V
DC Voltage Applied to Outputs
in High-Z State	–0.5V to VDDQ + 0.5V
DC Input Voltage[12]	–0.5V to V		+ 0.5V
		DDQ

Current into Outputs (LOW)					20 mA
Static Discharge Voltage					> 2001V
(per MIL-STD-883, Method 3015)
Latch-up Current				> 200 mA
Operating Range
Range	Ambient	V	[14]	V	[14]
	Temperature(T )
	A		DD		DDQ
Com’l	0°C to +70°C	1.8 ± 0.1 V		1.4V to VDD

DC Electrical Characteristics Over the Operating Range[9,14]

Parameter	Description	Test Conditions		Min.	Typ.	Max.	Unit
VDD	Power Supply Voltage			1.7	1.8	1.9	V
VDDQ	I/O Supply Voltage			1.4	1.5	VDD	V
VOH	Output HIGH Voltage	[10]		VDDQ/2 –0.12		VDDQ/2 + 0.12	V
VOL	Output LOW Voltage	[11]		VDDQ/2 – 0.12		VDDQ/2 + 0.12	V
VOH(LOW)	Output HIGH Voltage	IOH = −0.1 mA, Nominal Impedance		VDDQ – 0.2		VDDQ	V
VOL(LOW)	Output LOW Voltage	IOL = 0.1 mA, Nominal Impedance		VSS		0.2	V
VIH	Input HIGH Voltage[12]			VREF + 0.1		VDDQ+0.3	V
VIL	Input LOW Voltage[12, 13]			–0.3		VREF – 0.1	V
VIN	Clock Input Voltage			–0.3		VDDQ + 0.3	V
IX	Input Load Current	GND ≤ VI ≤ VDDQ		−5		5	∝A
IOZ	Output Leakage Current	GND ≤ VI ≤ VDDQ, Output Disabled		−5		5	∝A
VREF	Input Reference Voltage[15]	Typical Value = 0.75V		0.68	0.75	0.95	V
IDD	VDD Operating Supply	VDD = Max., IOUT = 0 mA,	133 MHz			700	mA
		f = fMAX = 1/tCYC
			167 MHz			800	mA
ISB1	Automatic	Max. VDD, Both Ports	133 MHz			450	mA
	Power-down Current	Deselected, VIN ≥ VIH or
			167 MHz			470	mA
		VIN ≤ VIL f = fMAX = 1/tCYC,
		Inputs Static

AC Electrical Characteristics Over the Operating Range

Parameter	Description	Test Conditions	Min.	Typ.	Max.	Unit
VIH	Input High (Logic 1) Voltage		VREF + 0.2	–	–	V
VIL	Input Low (Logic 0) Voltage		–	–	VREF – 0.2	V

Notes:

9. All Voltage referenced to Ground.

10. Output are impedance controlled. Ioh=-(Vddq/2)/(RQ/5) for values of 175 ohms <= RQ <= 350 ohms.

11. Output are impedance controlled. Iol=(Vddq/2)/(RQ/5) for values of 175 ohms <= RQ <= 350 ohms.

12. Overshoot: VIH(AC) < VDDQ +0.85V (Pulse width less than tCYC/2), Undershoot: VIL(AC) > -1.5V (Pulse width less than tCYC/2).

13. This spec is for all inputs except C and C clocks. For C and C clocks, VIL(Max.) = VREF – 0.2V.

14. Power-up: Assumes a linear ramp from 0v to VDD(min.) within 200ms. During this time VIH < VDD and VDDQ < VDD

15. VREF (Min.) = 0.68V or 0.46VDDQ, whichever is larger, VREF (Max.) = 0.95V or 0.54VDDQ, whichever is smaller.

Document #: 38-05497 Rev. *A Page 9 of 21

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