Cypress CY7C1446AV33 Document History, Document Number, Issue Date Orig. Description of Change

Page 30

CY7C1440AV33

CY7C1442AV33

CY7C1446AV33

Document History Page

 

Document Title: CY7C1440AV33/CY7C1442AV33/CY7C1446AV33 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync

 

SRAM

 

 

 

 

 

Document Number: 38-05383

 

 

 

REV.

ECN NO.

Issue Date

Orig. of

Description of Change

 

Change

 

**

124437

03/04/03

CJM

New data sheet

 

 

 

 

 

 

 

*A

254910

See ECN

SYT

Part number changed from previous revision. New and old part number differ

 

 

 

 

 

by the letter “A”

 

 

 

 

 

Modified Functional Block diagrams

 

 

 

 

 

Modified switching waveforms

 

 

 

 

 

Added Boundary scan information

 

 

 

 

 

Added Footnote #14 (32-Bit Vendor ID Code changed)

 

 

 

 

 

Added IDD, IX and ISB values in the DC Electrical Characteristics

 

 

 

 

 

Added tPOWER specifications in Switching Characteristics table

 

 

 

 

 

Removed 119 PBGA package

 

 

 

 

 

Changed 165 FBGA package from BB165C (15 x 17 x 1.20 mm) to BB165

 

 

 

 

 

(15 x 17 x 1.40 mm)

 

 

 

 

 

Changed 209-Lead PBGA BG209 (14 x 22 x 2.20 mm) to BB209A (14 x 22

 

 

 

 

 

x 1.76 mm)

 

*B

306335

See ECN

SYT

Changed H9 pin from VSSQ to VSS on the Pin Configuration table for 209

 

 

 

 

 

FBGA on Page # 6

 

 

 

 

 

Changed tCO from 3.0 to 3.2 ns and tDOH from 1.3 ns to 1.5 ns for 200 Mhz

 

 

 

 

 

speed bin on the Switching Characteristics table on Page # 19

 

 

 

 

 

Changed ΘJA and ΘJC from TBD to 25.21 and 2.58 °C/W respectively for

 

 

 

 

 

TQFP Package on Pg # 19

 

 

 

 

 

Replaced ΘJA and ΘJC from TBD to respective Values for 165 BGA and 209

 

 

 

 

 

FBGA Packages on the Thermal Resistance Table

 

 

 

 

 

Added lead-free information for 100-pin TQFP, 165 FBGA and 209 FBGA

 

 

 

 

 

Packages

 

 

 

 

 

Changed IDD from 450, 400 and 350 mA to 475, 425 and 375 mA for

 

 

 

 

 

frequencies of 250, 200 and 167 MHz respectively

 

 

 

 

 

Changed ISB1 from 190, 180 and 170 mA to 225 mA for frequencies of 250,

 

 

 

 

 

200 and 167 MHz respectively

 

 

 

 

 

Changed ISB2 from 80 to 100 mA

 

 

 

 

 

Changed ISB3 from 180, 170 and 160 mA to 200 mA for frequencies of 250,

 

 

 

 

 

200 and 167 MHz respectively

 

 

 

 

 

Changed ISB4 from 100 to 110 mA

 

*C

332173

See ECN

SYT

Modified Address Expansion balls in the pinouts for 165 FBGA and 209

 

 

 

 

 

FBGA Package as per JEDEC standards

 

 

 

 

 

Modified VOL, VOH test conditions

 

 

 

 

 

Changed CIN, CCLK and CI/O to 7, 7and 6 pF from 5, 5 and 7 pF for 165 FBGA

 

 

 

 

 

Package

 

 

 

 

 

Changed ISB2 and ISB4 from 100 and 110 mA to 120 and 135 mA respectively

 

 

 

 

 

Added Industrial Temperature Grade

 

 

 

 

 

Included the missing 100 TQFP Package Diagram

 

 

 

 

 

Updated the Ordering Information by Shading and Unshading MPNs as per

 

 

 

 

 

availability

 

*D

417547

See ECN

RXU

Converted from Preliminary to Final

 

 

 

 

 

Changed address of Cypress Semiconductor Corporation on Page# 1 from

 

 

 

 

 

“3901 North First Street” to “198 Champion Court”

 

 

 

 

 

Changed IX current value in MODE from –5 & 30 ∝A to –30 & 5 ∝A respec-

 

 

 

 

 

tively and also Changed IX current value in ZZ from –30 & 5 ∝A to –5 & 30

 

 

 

 

 

∝A respectively on page# 18

 

 

 

 

 

Modified test condition in note# 8 from VIH < VDD to VIH < VDD

 

 

 

 

 

Modified “Input Load” to “Input Leakage Current except ZZ and MODE” in the

 

 

 

 

 

Electrical Characteristics Table

 

 

 

 

 

Replaced Package Name column with Package Diagram in the Ordering

 

 

 

 

 

Information table

 

 

 

 

 

Replaced Package Diagram of 51-85050 from *A to *B

 

 

 

 

 

Updated the Ordering Information

Document #: 38-05383 Rev. *E

 

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Contents Selection Guide FeaturesFunctional Description1 250 MHz 200 MHz 167 MHz UnitLogic Block Diagram CY7C1440AV33 1M x Logic Block Diagram CY7C1442AV33 2M xCY7C1440AV33 Pin Configurations Pin Tqfp Pinout CY7C1442AV33 2M xCY7C1442AV33 2M x Pin Definitions Name DescriptionByte Write Select Inputs, active LOW. Qualified with Ground for the core of the device Power supply inputs to the core of the devicePower supply for the I/O circuitry Ground for the I/O circuitryFunctional Overview Interleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Write Cycle, Suspend Burst Truth Table for Read/Write4,8,9Truth Table for Read/Write4, 8 Function CY7C1440AV33TAP Controller State Diagram TAP Controller Block DiagramIeee 1149.1 Serial Boundary Scan Jtag Performing a TAP Reset TAP RegistersTAP Instruction Set TAP Timing Bypass5V TAP AC Test Conditions TAP AC Switching Characteristics Over the operating Range103V TAP AC Test Conditions 5V TAP AC Output Load EquivalentScan Register Sizes TAP DC Electrical Characteristics And Operating ConditionsIdentification Register Definitions Identification CodesBypass Ball Fbga Boundary Scan Order 14,15SAMPLE/PRELOAD CY7C1440AV33 1M x 36, CY7C1442AV33 2M x Bit # Ball IDBall Fbga Boundary Scan Order 14 CY7C1446AV33 512K x Bit # Ball IDOperating Range Electrical Characteristics Over the Operating Range17Maximum Ratings Ambient RangeCapacitance19 Thermal ResistanceAC Test Loads and Waveforms Min Max Switching Characteristics Over the Operating Range 24250 200 167 Parameter Description Unit Min Set-up TimesSwitching Waveforms Read Cycle Timing26Write Cycle Timing26 Read/Write Cycle Timing26, 28 CLZZZ Mode Timing30 DON’T CareOrdering Information 250 Package Diagrams Pin Tqfp 14 x 20 x 1.4 mmBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Issue Date Orig. Description of Change Document HistoryDocument Number 473650 AC Switching Characteristics tableUpdated the Ordering Information table VKN
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