Cypress CY7C1474BV25 TAP AC Switching Characteristics, Parameter Description Min Max Unit Clock

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CY7C1470BV25

CY7C1472BV25, CY7C1474BV25

TAP AC Switching Characteristics

Over the Operating Range [9, 10]

Parameter

Description

Min

Max

Unit

Clock

 

 

 

 

 

 

 

 

 

tTCYC

TCK Clock Cycle Time

50

 

ns

tTF

TCK Clock Frequency

 

20

MHz

tTH

TCK Clock HIGH time

20

 

ns

tTL

TCK Clock LOW time

20

 

ns

Output Times

 

 

 

 

tTDOV

TCK Clock LOW to TDO Valid

 

10

ns

tTDOX

TCK Clock LOW to TDO Invalid

0

 

ns

Setup Times

 

 

 

 

tTMSS

TMS Setup to TCK Clock Rise

5

 

ns

tTDIS

TDI Setup to TCK Clock Rise

5

 

ns

tCS

Capture Setup to TCK Rise

5

 

ns

Hold Times

 

 

 

 

 

 

 

 

 

tTMSH

TMS Hold after TCK Clock Rise

5

 

ns

tTDIH

TDI Hold after Clock Rise

5

 

ns

tCH

Capture Hold after Clock Rise

5

 

ns

Notes

9.tCS and tCH refer to the setup and hold time requirements of latching data from the boundary scan register.

10.Test conditions are specified using the load in TAP AC Test Conditions. tR/tF = 1 ns.

Document #: 001-15032 Rev. *D

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Contents Description 250 MHz 200 MHz 167 MHz Unit FeaturesFunctional Description Selection GuideLogic Block Diagram CY7C1472BV25 4M x Logic Block Diagram CY7C1470BV25 2M xADV/LD Logic Block Diagram CY7C1474BV25 1M xPin Tqfp Pinout Pin ConfigurationsMode CENNC/1G CE2 CLK TDI TDOBall Fbga 14 x 22 x 1.76 mm Pinout CY7C1474BV25 1M × TDI Pin Definitions Pin Name IO Type Pin DescriptionADV/LD DqpxFunctional Overview ZZ Mode Electrical Characteristics Burst Write AccessesParameter Description Test Conditions Min Max Unit Truth Table Address OperationUsed Function CY7C1474BV25 Partial Write Cycle DescriptionFunction CY7C1470BV25 Function CY7C1472BV25Ieee 1149.1 Serial Boundary Scan Jtag TAP Controller State DiagramTAP Instruction Set TAP Timing TAP AC Switching Characteristics Parameter Description Min Max Unit ClockHold Times Scan Register Sizes Register Name Bit Size TAP DC Electrical Characteristics And Operating Conditions5V TAP AC Test Conditions GND ≤ VI ≤ VddqBoundary Scan Exit Order 2M x Bit # Ball ID Identification Codes Instruction Description10 R1 11 R2 12 R3 13 P2 Boundary Scan Exit Order 4M xBoundary Scan Exit Order 1M x Bit # Ball IDRange Ambient Electrical CharacteristicsMaximum Ratings Operating RangeParameter Description Test Conditions Tqfp Fbga Unit CapacitanceThermal Resistance AC Test Loads and WaveformsOutput Times Switching CharacteristicsSetup Times Parameter Description 250 200 167 Unit Min MaxA3 A4 Switching WaveformsADV/LD Address DataNOP, Stall and Deselect Cycles Ordering Information 250 Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package DiagramsBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm Document History ECN No Issue Date Orig. of Change Description of Change