Cypress CY7C1472BV25, CY7C1474BV25, CY7C1470BV25 Switching Waveforms, ADV/LD Address, Data, A3 A4

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CY7C1470BV25

CY7C1472BV25, CY7C1474BV25

Switching Waveforms

Figure 6 shows read-write timing waveform.[19, 20, 21]

Figure 6. Read/Write Timing

1

 

2

t CYC

3

 

 

 

 

CLK

 

 

 

 

 

tCENS

tCENH

tCH

tCL

 

CEN

 

 

 

 

 

tCES

tCEH

 

 

 

 

4 5

6

7

8

9

10

 

 

 

 

 

 

 

 

 

 

CE

 

ADV/LD

 

WE

 

BW x

 

ADDRESS

A1

tAS

tAH

Data

 

In-Out (DQ)

 

A2

tDS tDH

D(A1)

A3 A4

tCO

tCLZ

D(A2) D(A2+1)

 

A5

 

A6

A7

 

tDOH

tOEV

tCHZ

 

 

Q(A3)

Q(A4)

 

Q(A4+1)

D(A5)

Q(A6)

 

tOEHZ

 

 

 

 

 

 

 

tDOH

 

 

OE

WRITE

WRITE

BURST

D(A1)

D(A2)

WRITE

 

 

D(A2+1)

 

 

 

 

 

 

 

 

tOELZ

READ

READ

BURST

WRITE

READ

WRITE

DESELECT

Q(A3)

Q(A4)

READ

D(A5)

Q(A6)

D(A7)

 

 

 

Q(A4+1)

 

 

 

 

DON’T CARE

 

UNDEFINED

 

 

 

 

Notes

19.For this waveform ZZ is tied LOW.

20.When CE is LOW, CE1 is LOW, CE2 is HIGH, and CE3 is LOW. When CE is HIGH,CE1 is HIGH, CE2 is LOW, or CE3 is HIGH.

21.Order of the Burst sequence is determined by the status of the MODE (0 = Linear, 1 = Interleaved).Burst operations are optional.

Document #: 001-15032 Rev. *D

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Contents Selection Guide FeaturesFunctional Description Description 250 MHz 200 MHz 167 MHz UnitLogic Block Diagram CY7C1470BV25 2M x Logic Block Diagram CY7C1472BV25 4M xLogic Block Diagram CY7C1474BV25 1M x ADV/LDPin Configurations Pin Tqfp PinoutTDI TDO CENNC/1G CE2 CLK ModeBall Fbga 14 x 22 x 1.76 mm Pinout CY7C1474BV25 1M × Dqpx Pin Definitions Pin Name IO Type Pin DescriptionADV/LD TDIFunctional Overview Burst Write Accesses ZZ Mode Electrical CharacteristicsParameter Description Test Conditions Min Max Unit Address Operation Truth TableUsed Function CY7C1472BV25 Partial Write Cycle DescriptionFunction CY7C1470BV25 Function CY7C1474BV25TAP Controller State Diagram Ieee 1149.1 Serial Boundary Scan JtagTAP Instruction Set TAP Timing Parameter Description Min Max Unit Clock TAP AC Switching CharacteristicsHold Times GND ≤ VI ≤ Vddq TAP DC Electrical Characteristics And Operating Conditions5V TAP AC Test Conditions Scan Register Sizes Register Name Bit SizeIdentification Codes Instruction Description Boundary Scan Exit Order 2M x Bit # Ball IDBit # Ball ID Boundary Scan Exit Order 4M xBoundary Scan Exit Order 1M x 10 R1 11 R2 12 R3 13 P2Operating Range Electrical CharacteristicsMaximum Ratings Range AmbientAC Test Loads and Waveforms CapacitanceThermal Resistance Parameter Description Test Conditions Tqfp Fbga UnitParameter Description 250 200 167 Unit Min Max Switching CharacteristicsSetup Times Output TimesData Switching WaveformsADV/LD Address A3 A4NOP, Stall and Deselect Cycles Ordering Information 250 Package Diagrams Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mmBall Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x 1.76 mm ECN No Issue Date Orig. of Change Description of Change Document History