Cypress CY7C1422BV18, CY7C1423BV18, CY7C1429BV18, CY7C1424BV18 manual BWS0 BWS1 BWS2 BWS3

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CY7C1422BV18, CY7C1429BV18

CY7C1423BV18, CY7C1424BV18

Write Cycle Descriptions

The write cycle description table for CY7C1429BV18 follows. [2, 8]

BWS0

K

K

Comments

L

L–H

During the Data portion of a write sequence, the single byte (D[8:0]) is written into the device.

L

L–H

During the Data portion of a write sequence, the single byte (D[8:0]) is written into the device.

H

L–H

No data is written into the device during this portion of a write operation.

 

 

 

 

H

L–H

No data is written into the device during this portion of a write operation.

 

 

 

 

Write Cycle Descriptions

The write cycle description table for CY7C1424BV18 follows. [2, 8]

BWS0

BWS1

BWS2

BWS3

K

K

Comments

L

L

L

L

L–H

During the Data portion of a write sequence, all four bytes (D[35:0]) are written into

 

 

 

 

 

 

the device.

 

 

 

 

 

 

 

L

L

L

L

L–H

During the Data portion of a write sequence, all four bytes (D[35:0]) are written into

 

 

 

 

 

 

the device.

L

H

H

H

L–H

During the Data portion of a write sequence, only the lower byte (D[8:0]) is written

 

 

 

 

 

 

into the device. D[35:9] remains unaltered.

L

H

H

H

L–H

During the Data portion of a write sequence, only the lower byte (D[8:0]) is written

 

 

 

 

 

 

into the device. D[35:9] remains unaltered.

H

L

H

H

L–H

During the Data portion of a write sequence, only the byte (D[17:9]) is written into

 

 

 

 

 

 

the device. D[8:0] and D[35:18] remains unaltered.

H

L

H

H

L–H

During the Data portion of a write sequence, only the byte (D[17:9]) is written into

 

 

 

 

 

 

the device. D[8:0] and D[35:18] remains unaltered.

H

H

L

H

L–H

During the Data portion of a write sequence, only the byte (D[26:18]) is written into

 

 

 

 

 

 

the device. D[17:0] and D[35:27] remains unaltered.

H

H

L

H

L–H

During the Data portion of a write sequence, only the byte (D[26:18]) is written into

 

 

 

 

 

 

the device. D[17:0] and D[35:27] remains unaltered.

H

H

H

L

L–H

During the Data portion of a write sequence, only the byte (D[35:27]) is written into

 

 

 

 

 

 

the device. D[26:0] remains unaltered.

H

H

H

L

L–H

During the Data portion of a write sequence, only the byte (D[35:27]) is written into

 

 

 

 

 

 

the device. D[26:0] remains unaltered.

H

H

H

H

L–H

No data is written into the device during this portion of a write operation.

 

 

 

 

 

 

 

H

H

H

H

L–H

No data is written into the device during this portion of a write operation.

 

 

 

 

 

 

 

Document #: 001-07035 Rev. *D

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Contents Selection Guide FeaturesConfigurations Functional DescriptionDoff Logic Block Diagram CY7C1422BV18CLK Logic Block Diagram CY7C1424BV18 Logic Block Diagram CY7C1423BV18CY7C1429BV18 4M x Pin ConfigurationBall Fbga 15 x 17 x 1.4 mm Pinout CY7C1422BV18 4M xCY7C1424BV18 1M x CY7C1423BV18 2M xSynchronous Read/Write Input. When Pin DefinitionsPin Name Pin Description TDO for Jtag Power Supply Inputs to the Core of the DevicePower Supply Inputs for the Outputs of the Device Referenced with Respect toFunctional Overview Echo Clocks Application ExampleBWS0/ BWS1 NWS0 NWS1 Truth TableWrite Cycle Descriptions LD R/WBWS0 BWS1 BWS2 BWS3 BWS0Ieee 1149.1 Serial Boundary Scan Jtag Idcode TAP Controller State Diagram TCK TAP Controller Block DiagramTAP Electrical Characteristics TDITAP Timing and Test Conditions TAP AC Switching CharacteristicsRegister Name Bit Size Identification Register DefinitionsScan Register Sizes Instruction CodesBit # Bump ID Boundary Scan OrderDLL Constraints Power Up Sequence in DDR-II SramPower Up Sequence Maximum Ratings Electrical CharacteristicsDC Electrical Characteristics AC Electrical Characteristics Parameter Description Test Conditions Fbga Unit CapacitanceThermal Resistance Parameter Description Test Conditions Max UnitLOW Switching CharacteristicsHigh DLL Timing Static to DLL ResetBurst Switching WaveformsNOP Read Write Ordering Information 250 167 Ball Fbga 15 x 17 x 1.4 mm Package DiagramREV ECN no Submission ORIG. Description of Change Date Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions Document History