Cypress CY8C22113 manual User Modules and the PSoC Development Process, Device Editor, Debugger

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CY8C22x13 Final Data Sheet

PSoC™ Overview

 

 

User Modules and the PSoC

Development Process

The development process for the PSoC device differs from that of a traditional fixed function microprocessor. The configurable analog and digital hardware blocks give the PSoC architecture a unique flexibility that pays dividends in managing specification change during development and by lowering inventory costs. These configurable resources, called PSoC Blocks, have the ability to implement a wide variety of user-selectable functions. Each block has several registers that determine its function and connectivity to other blocks, multiplexers, buses, and to the IO pins. Iterative development cycles permit you to adapt the hard- ware as well as the software. This substantially lowers the risk of having to select a different part to meet the final design requirements.

To speed the development process, the PSoC Designer Inte- grated Development Environment (IDE) provides a library of pre-built, pre-tested hardware peripheral functions, called “User Modules.” User modules make selecting and implementing peripheral devices simple, and come in analog, digital, and mixed signal varieties. The standard User Module library con- tains over 50 common peripherals such as ADCs, DACs Tim- ers, Counters, UARTs, and other not-so common peripherals such as DTMF Generators and Bi-Quad analog filter sections.

Each user module establishes the basic register settings that implement the selected function. It also provides parameters that allow you to tailor its precise configuration to your particular application. For example, a Pulse Width Modulator User Mod- ule configures one or more digital PSoC blocks, one for each 8 bits of resolution. The user module parameters permit you to establish the pulse width and duty cycle. User modules also provide tested software to cut your development time. The user module application programming interface (API) provides high- level functions to control and respond to hardware events at run-time. The API also provides optional interrupt service rou- tines that you can adapt as needed.

The API functions are documented in user module data sheets that are viewed directly in the PSoC Designer IDE. These data sheets explain the internal operation of the user module and provide performance specifications. Each data sheet describes the use of each user module parameter and documents the set- ting of each register controlled by the user module.

The development process starts when you open a new project and bring up the Device Editor, a pictorial environment (GUI) for configuring the hardware. You pick the user modules you need for your project and map them onto the PSoC blocks with point- and-click simplicity. Next, you build signal chains by intercon- necting user modules to each other and the IO pins. At this stage, you also configure the clock source connections and enter parameter values directly or by selecting values from drop-down menus. When you are ready to test the hardware configuration or move on to developing code for the project, you perform the “Generate Application” step. This causes PSoC Designer to generate source code that automatically configures

the device to your specification and provides the high-level user module API functions.

 

Device Editor

 

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Application Editor

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User Modules and Development Process Flow Chart

The next step is to write your main program, and any sub-rou- tines using PSoC Designer’s Application Editor subsystem. The Application Editor includes a Project Manager that allows you to open the project source code files (including all gener- ated code files) from a hierarchal view. The source code editor provides syntax coloring and advanced edit features for both C and assembly language. File search capabilities include simple string searches and recursive “grep-style” patterns. A single mouse click invokes the Build Manager. It employs a profes- sional-strength “makefile” system to automatically analyze all file dependencies and run the compiler and assembler as nec- essary. Project-level options control optimization strategies used by the compiler and linker. Syntax errors are displayed in a console window. Double clicking the error message takes you directly to the offending line of source code. When all is correct, the linker builds a ROM file image suitable for programming.

The last step in the development process takes place inside the PSoC Designer’s Debugger subsystem. The Debugger down- loads the ROM image to the In-Circuit Emulator (ICE) where it runs at full speed. Debugger capabilities rival those of systems costing many times more. In addition to traditional single-step, run-to-breakpoint and watch-variable features, the Debugger provides a large trace buffer and allows you define complex breakpoint events that include monitoring address and data bus values, memory locations and external signals.

June 3, 2004

Document No. 38-12009 Rev. *E

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Contents PSoC Core FeaturesPSoC Functional Overview June Cypress MicroSystems, Inc Document No -12009 Rev. *EDigital System CY8C22x13 Final Data Sheet PSoC OverviewDigital System Block Diagram Analog SystemPSoC Device Characteristics PSoC Device CharacteristicsAnalog System Block Diagram Additional System ResourcesGetting Started Development ToolsPSoC Designer Subsystems June 3 Document No -12009 Rev. *E PSoC Designer Software Subsystems Hardware ToolsPSoC Development Tool Kit June 3 Document No -12009 Rev. *E Device Editor User Modules and Development Process Flow ChartUser Modules and the PSoC Development Process Application EditorTable of Contents Document Conventions1 8-Pin Part Pinout Pin InformationPinouts 2 20-Pin Part PinoutPin Part Pinout MLF CY8C22x13 Final Data Sheet Pin Information3 32-Pin Part Pinout CY8C22213 PSoC DeviceRegister Mapping Tables Register ReferenceRegister Conventions Abbreviations UsedBlank fields are Reserved and should not be accessed CY8C22x13 Final Data Sheet2. Register ReferenceName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessUnits of Measure Electrical SpecificationsSymbol Unit of Measure Vdd VoltageOperating Temperature Operating TemperatureCY8C22x13 Final Data Sheet Electrical Specifications Absolute Maximum RatingsDC General Purpose IO Specifications DC Electrical CharacteristicsDC Chip-Level Specifications DC Chip-Level SpecificationsDC Operational Amplifier Specifications V DC Operational Amplifier SpecificationsPsrr OA Psrroa 3V DC Analog Output Buffer Specifications DC Analog Output Buffer SpecificationsV DC Analog Output Buffer Specifications Psrr OB10 V DC Analog Reference Specifications DC Analog Reference SpecificationsDC Analog PSoC Block Specifications 11 .3V DC Analog Reference SpecificationsDC POR and LVD Specifications 13. DC POR and LVD SpecificationsDC Programming Specifications 14. DC Programming SpecificationsAC Electrical Characteristics AC Chip-Level Specifications15. AC Chip-Level Specifications Tpllslewlow TOSAC General Purpose IO Specifications 16. AC Gpio SpecificationsAC Operational Amplifier Specifications 17 V AC Operational Amplifier SpecificationsBW OA Bwoa AC Digital Block Specifications 19. AC Digital Block SpecificationsFunction Description Min Typ Max Units 21 .3V AC Analog Output Buffer Specifications AC Analog Output Buffer Specifications20 V AC Analog Output Buffer Specifications BW OB22 V AC External Clock Specifications AC External Clock SpecificationsAC Programming Specifications 23 .3V AC External Clock SpecificationsStandard Mode Fast Mode Symbol Description Min Max Units AC I2C Specifications25. AC Characteristics of the I2C SDA and SCL Pins TLOWI2C TSUDATI2CPackaging Dimensions Packaging InformationLead 150-Mil Soic Lead 300-Mil Molded DIP June 3 Document No -12009 Rev. *ELead 210-Mil Ssop Thermal Impedances Capacitance on Crystal PinsTypical Package Capacitance on Crystal Pins Thermal Impedances per PackageCY 8 C 22 xxx-SPxx Ordering InformationOrdering Code Definitions RowsRevision History CY8C22x13 Data Sheet Revision HistorySales and Company Information Copyrights