Cypress CY7C64345, CY7C6431x, CY7C6435x manual Document History, Tyj/Ari

CY7C6431x

CY7C64345, CY7C6435x

Document History Page

Document Title: CY7C6431x, CY7C64345, CY7C6435x, enCoRe™ V Full Speed USB Controller
Document Number: 001-12394
Rev.	ECN No.	Orig. of	Submission	Description of Change
		Change	Date
**	626256	TYJ	See ECN	New data sheet.
*A	735718	TYJ/ARI	See ECN	Filled in TBDs, added new block diagram, and corrected some values. Part numbers
				updated as per new specifications.
*B	1120404	ARI	See ECN	Corrected the block diagram and Figure 3, which is the 16-pin enCoRe V device.
				Corrected the description to pin 29 on Table 2, the Typ/Max values for ISB0 on the DC
				chip-level specifications, the current value for the latch-up current in the Electrical
				Characteristics section, and corrected the 16 QFN package information in the
				Thermal Impedance table.
				Corrected some of the bulleted items on the first page.
				Added DC Characteristics–USB Interface table.
				Added AC Characteristics–USB Data Timings table.
				Added AC Characteristics–USB Driver table.
				Corrected Flash Write Endurance minimum value in the DC Programming Specifica-
				tions table.
				Corrected the Flash Erase Time max value and the Flash Block Write Time max value
				in the AC Programming Specifications table.
				Implemented new latest template.
				Include parameters: Vcrs, Rpu (USB, active), Rpu (USB suspend), Tfdeop, Tfeopr2,
				Tfeopt, Tfst.
				Added register map tables.
				Corrected a value in the DC Chip-Level Specifications table.
*C	1241024	TYJ/ARI	See ECN	Corrected Idd values in Table 6 - DC Chip-Level Specifications.
*D	1639963	AESA	See ECN	Post to www.cypress.com
*E	2138889	TYJ/PYRS	See ECN	Updated Ordering Code table:
				- Ordering code changed for 32-QFN package: From -32LKXC to -32LTXC
				- Added a new package type – “LTXC” for 48-QFN
				- Included Tape and Reel ordering code for 32-QFN and 48-QFN packages
				Changed active current values at 24, 12 and 6MHz in table “DC Chip-Level Specifi-
				cations”
				- IDD24: 2.15 to 3.1mA
				- IDD12: 1.45 to 2.0mA
				- IDD6: 1.1 to 1.5mA
				Added information on using P1[0] and P1[1] as the I2C interface during POR or reset
				events
*F	2583853	TYJ/PYRS/	10/10/08	Converted from Preliminary to Final
		HMT		Added operating voltage ranges with USB
				ADC resolution changed from 10-bit to 8-bit
				Rephrased battery monitoring clause in page 1 to include “with external components”
				Included ADC specifications table
				Included Voh7, Voh8, Voh9, Voh10 specs
				Flash data retention – condition added to Note [11]
				Input leakage spec changed to 25 nA max
				Under AC Char, Frequency accuracy of ILO corrected
				GPIO rise time for ports 0,1 and ports 2,3 made common
				AC Programming specifications updated
				Included AC Programming cycle timing diagram
				AC SPI specification updated
				Spec change for 32-QFN package
				Input Leakage Current maximum value changed to 1 μA
				Updated VOHV parameter in Table 13
				Updated thermal impedances for the packages
				Update Development Tools, add Designing with PSoC Designer. Edit, fix links and
				table format. Update TMs.
Document Number: 001-12394 Rev *G				Page 27 of 28

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