Cypress CY7C64345, CY7C6431x, CY7C6435x manual Pin Configuration, Pin Part Pinout

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CY7C6431x

CY7C64345, CY7C6435x

Pin Configuration

The enCoRe V USB device is available in a variety of packages which are listed and illustrated in the subsequent tables.

16-Pin Part Pinout

Figure 1. CY7C64315/CY7C64316 16-Pin enCoRe V Device

P2[3]

P1[7]

P1[5]

P1[1]

1

2

3 4

P2[5]

P0[1]

P0[3]

P0[7]

 

16

15

14

13

12

 

 

 

 

 

QFN

 

11

 

(Top View)

10

5 6 7 8

9

 

Vss

D+

D–

Vdd

 

P0[4]

XRES

P1[4]

P1[0]

Table 1. 16-Pin Part Pinout (QFN)

Pin No.

Type

Name

Description

1

I/O

P2[3]

Digital I/O, Crystal Input (Xin)

 

 

 

 

2

IOHR

P1[7]

Digital I/O, SPI SS, I2C SCL

 

 

 

 

3

IOHR

P1[5]

Digital I/O, SPI MISO, I2C SDA

 

 

 

 

4

IOHR

P1[1](1, 2)

Digital I/O, ISSP CLK, 12C SCL, SPI MOSI

5

Power

Vss

Ground connection

 

 

 

 

6

USB line

D+

USB PHY

 

 

 

 

7

USB line

D–

USB PHY

 

 

 

 

8

Power

Vdd

Supply

 

 

 

 

9

IOHR

P1[0](1, 2)

Digital I/O, ISSP DATA, I2C SDA, SPI CLK

10

IOHR

P1[4]

Digital I/O, optional external clock input (EXTCLK)

 

 

 

 

11

Input

XRES

Active high external reset with internal pull down

 

 

 

 

12

IOH

P0[4]

Digital I/O

 

 

 

 

13

IOH

P0[7]

Digital I/O

 

 

 

 

14

IOH

P0[3]

Digital I/O

 

 

 

 

15

IOH

P0[1]

Digital I/O

 

 

 

 

16

I/O

P2[5]

Digital I/O, Crystal Output (Xout)

 

 

 

 

LEGEND I = Input, O = Output, OH = 5 mA High Output Drive, R = Regulated Output

Notes

1.During power up or reset event, device P1[0] and P1[1] may disturb the I2C bus. Use alternate pins if issues are encountered.

2.These are the in-system serial programming (ISSP) pins that are not High Z at power on reset (POR).

Document Number: 001-12394 Rev *G

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Contents Features EnCoRe V Block DiagramCypress Semiconductor Corporation 198 Champion Court EnCoRe V Core Functional OverviewGetting Started Additional System ResourcesDevelopment Tools PSoC Designer Software SubsystemsSelect Components Configure ComponentsDesigning with PSoC Designer Generate, Verify, and DebugUnits of Measure Document ConventionsAcronyms Used Numeric NamingPin Configuration Pin Part PinoutPin Part Pinout QFN Pin No Type Name Description QFN CY7C64355/CY7C64356 48-Pin enCoRe V USB Device Pin Part Pinout QFN Pin No Type Pin Name DescriptionCY7C6431x Register Mapping Tables Register ReferenceRegister Conventions Register Conventions DescriptionName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessElectrical Specifications Units of Measure Symbol Unit of MeasureADC Electrical Specifications INLDC Chip Level Specifications Electrical CharacteristicsDC Electrical Characteristics Absolute Maximum RatingsDC General Purpose IO Specifications DC POR and LVD Specifications AC Electrical Characteristics DC Programming SpecificationsAC Chip Level Specifications 160 175 AC General Purpose I/O Specifications AC External Clock SpecificationsAC Programming Specifications AC SPI SpecificationsAC SPI Specifications Symbol Description Min Typ Max Units AC I2C Specifications Definition of Timing for Fast/Standard Mode on the I2C BusPackage Diagram Packaging DimensionsPin 5 x 5 x 0.55 mm QFN Package Handling Pin 7 x 7 x 0.9 mm QFNSolder Reflow Peak Temperature Thermal ImpedancesOrdering Information Document History TYJ/ARISales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC Solutions