Cypress CY7C6435x, CY7C64345, CY7C6431x manual CY7C64355/CY7C64356 48-Pin enCoRe V USB Device

Page 8

CY7C6431x

CY7C64345, CY7C6435x

48-Pin Part Pinout

Figure 3. CY7C64355/CY7C64356 48-Pin enCoRe V USB Device

NC

P2[7]

P2[5]

P2[3]

P2[1]

P4[3]

P4[1]

P3[7]

P3[5]

P3[3]

P3[1]

P1[7]

P0[1]

148

2

3

4

5

6

7

8

9

10

11

1213 P1[5]

47 Vss

NC 14

46 P0[3]

NC 15

P0[5]

P0[7]

NC NC Vdd

P0[6]

P0[4]

P0[2]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

45

 

44

 

43

42 41

 

40

 

39

 

38

 

QFN

(Top View)

16

17

18

19

20

21

22

23

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

P1[3]

P1[1]

Vss

D+

D-

Vdd

P1[0]

P1[2]

37 P0[0]

P1[4] 24

36

35

34

33

32

31

30

29

28

27

26

25

P2[6]

P2[4]

P2[2]

P2[0]

P4[2]

P4[0]

P3[6]

P3[4]

P3[2]

P3[0]

XRES P1[6]

Table 3. 48-Pin Part Pinout (QFN)

Pin No.

Type

Pin Name

Description

1

NC

NC

No connection

 

 

 

 

2

I/O

P2[7]

Digital I/O

 

 

 

 

3

I/O

P2[5]

Digital I/O, Crystal Out (Xout)

 

 

 

 

4

I/O

P2[3]

Digital I/O, Crystal In (Xin)

 

 

 

 

5

I/O

P2[1]

Digital I/O

 

 

 

 

6

I/O

P4[3]

Digital I/O

 

 

 

 

7

I/O

P4[1]

Digital I/O

 

 

 

 

8

I/O

P3[7]

Digital I/O

 

 

 

 

9

I/O

P3[5]

Digital I/O

 

 

 

 

10

I/O

P3[3]

Digital I/O

 

 

 

 

11

I/O

P3[1]

Digital I/O

 

 

 

 

12

IOHR

P1[7]

Digital I/O, I2C SCL, SPI SS

 

 

 

 

13

IOHR

P1[5]

Digital I/O, I2C SDA, SPI MISO

 

 

 

 

14

NC

NC

No connection

 

 

 

 

15

NC

NC

No connection

 

 

 

 

16

IOHR

P1[3]

Digital I/O, SPI CLK

 

 

 

 

17

IOHR

P1[1](1, 2)

Digital I/O, ISSP CLK, I2C SCL, SPI MOSI

18

Power

Vss

Supply ground

 

 

 

 

19

I/O

D+

USB

 

 

 

 

20

I/O

D–

USB

 

 

 

 

21

Power

Vdd

Supply voltage

 

 

 

 

22

IOHR

P1[0](1, 2)

Digital I/O, ISSP DATA, I2C SDA, SPI CLK

23

IOHR

P1[2]

Digital I/O,

 

 

 

 

24

IOHR

P1[4]

Digital I/O, optional external clock input (EXTCLK)

 

 

 

 

25

IOHR

P1[6]

Digital I/O

 

 

 

 

Document Number: 001-12394 Rev *G

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesEnCoRe V Block Diagram Functional Overview Getting StartedEnCoRe V Core Additional System ResourcesDevelopment Tools PSoC Designer Software SubsystemsConfigure Components Designing with PSoC DesignerSelect Components Generate, Verify, and DebugDocument Conventions Acronyms UsedUnits of Measure Numeric NamingPin Part Pinout QFN Pin No Type Name Description Pin ConfigurationPin Part Pinout QFN CY7C64355/CY7C64356 48-Pin enCoRe V USB Device Pin Part Pinout QFN Pin No Type Pin Name DescriptionCY7C6431x Register Reference Register ConventionsRegister Mapping Tables Register Conventions DescriptionName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessElectrical Specifications Units of Measure Symbol Unit of MeasureADC Electrical Specifications INLElectrical Characteristics DC Electrical CharacteristicsDC Chip Level Specifications Absolute Maximum RatingsDC General Purpose IO Specifications DC POR and LVD Specifications AC Chip Level Specifications AC Electrical CharacteristicsDC Programming Specifications 160 175 AC General Purpose I/O Specifications AC External Clock SpecificationsAC SPI Specifications Symbol Description Min Typ Max Units AC Programming SpecificationsAC SPI Specifications AC I2C Specifications Definition of Timing for Fast/Standard Mode on the I2C BusPackage Diagram Packaging DimensionsPin 5 x 5 x 0.55 mm QFN Package Handling Pin 7 x 7 x 0.9 mm QFNOrdering Information Solder Reflow Peak TemperatureThermal Impedances Document History TYJ/ARISales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC Solutions