Cypress CY7C64345, CY7C6431x, CY7C6435x manual AC Programming Specifications, AC SPI Specifications

CY7C6431x

CY7C64345, CY7C6435x

AC Programming Specifications

Table 19 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.

Table 19. AC Programming Specifications

Symbol	Description	Min	Typ	Max	Units
TRSCLK	Rise Time of SCLK	1	–	20	ns
TFSCLK	Fall Time of SCLK	1	–	20	ns
TSSCLK	Data Setup Time to Falling Edge of SCLK	40	–	–	ns
THSCLK	Data Hold Time from Falling Edge of SCLK	40	–	–	ns
FSCLK	Frequency of SCLK	0	–	8	MHz
TERASEB	Flash Erase Time (Block)	–	–	18	ms
TWRITE	Flash Block Write Time	–	–	25	ms
TDSCLK1	Data Out Delay from Falling Edge of SCLK, Vdd > 3.6V	–	–	60	ns
TDSCLK2	Data Out Delay from Falling Edge of SCLK, 3.0V<Vdd<3.6V	–	–	85	ns

Figure 7. Timing Diagram - AC Programming Cycle

AC SPI Specifications

Table 20 lists guaranteed maximum and minimum specifications for the entire voltage and temperature ranges.

Table 20. AC SPI Specifications

Symbol	Description	Min	Typ	Max	Units
FSPIM	Maximum Input Clock Frequency Selection, Master(14)	–	–	12	MHz
FSPIS	Maximum Input Clock Frequency Selection, Slave	–	–	12	MHz
TSS	Width of SS_ Negated Between Transmissions	50	–	–	ns

Notes

14. Output clock frequency is half of input clock rate.

Document Number: 001-12394 Rev *G Page 21 of 28

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