Cypress CY7C0832BV, CY7C0837AV, CY7C0833AV, CY7C0830AV, CY7C0832AV manual Switching Characteristics

Page 13

CY7C0837AV, CY7C0830AV

CY7C0831AV, CY7C0832AV

CY7C0832BV, CY7C0833AV

Figure 6. AC Test Load and Waveforms

Z0 = 50Ω

OUTPUT

C = 10 pF

R = 50Ω

OUTPUT

3.3V

R1 = 590 Ω

VTH = 1.5V

C = 5 pF

R2 = 435 Ω

(a) Normal Load (Load 1)

(b) Three-state Delay (Load 2)

ALL INPUT PULSES

3.0V

Vss

< 2 ns

 

 

90%

 

90%

 

 

 

 

 

 

 

 

10%

 

10%

 

 

< 2 ns

Switching Characteristics

Over the Operating Range

 

 

 

 

 

 

 

 

 

 

 

-167

-133

 

-100

 

 

 

 

 

 

 

 

 

 

 

 

CY7C0837AV

CY7C0837AV

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CY7C0830AV

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CY7C0830AV

 

 

 

 

 

Parameter

 

 

 

 

 

 

 

 

 

Description

CY7C0831AV

CY7C0833AV

CY7C0833AV

Unit

 

 

 

 

 

 

 

 

 

CY7C0831AV

 

 

 

 

 

 

 

 

 

 

 

CY7C0832AV

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CY7C0832AV

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CY7C0832BV

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Min

Max

Min

Max

Min

Max

Min

Max

 

fMAX2

 

Maximum Operating Frequency

 

167

 

133

 

133

 

100

MHz

tCYC2

 

Clock Cycle Time

6.0

 

7.5

 

7.5

 

10

 

ns

tCH2

 

Clock HIGH Time

2.7

 

3.0

 

3.0

 

4.0

 

ns

tCL2

 

Clock LOW Time

2.7

 

3.0

 

3.0

 

4.0

 

ns

tR[27]

 

Clock Rise Time

 

2.0

 

2.0

 

2.0

 

3.0

ns

tF[27]

 

Clock Fall Time

 

2.0

 

2.0

 

2.0

 

3.0

ns

tSA

 

Address Setup Time

2.3

 

2.5

 

2.5

 

3.0

 

ns

tHA

 

Address Hold Time

0.6

 

0.6

 

0.6

 

0.6

 

ns

tSB

 

Byte Select Setup Time

2.3

 

2.5

 

2.5

 

3.0

 

ns

tHB

 

Byte Select Hold Time

0.6

 

0.6

 

0.6

 

0.6

 

ns

tSC

 

Chip Enable Setup Time

2.3

 

2.5

 

NA

 

NA

 

ns

tHC

 

Chip Enable Hold Time

0.6

 

0.6

 

NA

 

NA

 

ns

tSW

 

R/W

 

Setup Time

2.3

 

2.5

 

2.5

 

3.0

 

ns

tHW

 

R/W

 

Hold Time

0.6

 

0.6

 

0.6

 

0.6

 

ns

tSD

 

Input Data Setup Time

2.3

 

2.5

 

2.5

 

3.0

 

ns

tHD

 

Input Data Hold Time

0.6

 

0.6

 

0.6

 

0.6

 

ns

tSAD

 

ADS

 

Setup Time

2.3

 

2.5

 

NA

 

NA

 

ns

tHAD

 

ADS

 

Hold Time

0.6

 

0.6

 

NA

 

NA

 

ns

tSCN

 

CNTEN

 

Setup Time

2.3

 

2.5

 

NA

 

NA

 

ns

tHCN

 

CNTEN

Hold Time

0.6

 

0.6

 

NA

 

NA

 

ns

tSRST

 

CNTRST

Setup Time

2.3

 

2.5

 

NA

 

NA

 

ns

tHRST

 

CNTRST

Hold Time

0.6

 

0.6

 

NA

 

NA

 

ns

tSCM

 

CNT/MSK

Setup Time

2.3

 

2.5

 

NA

 

NA

 

ns

Note

27. Except JTAG signals (tr and tf < 10 ns [max.]).

Document #: 38-06059 Rev. *S

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Contents Functional Description FeaturesTrue Logic Block DiagramRAM Array Mirror RegDQ9 L DQ9 R Pin ConfigurationsCE1L Byte Select Operation Pin DefinitionsMailbox Interrupts Master ResetAddress Counter and Mask Register Operations Interrupt Operation Example 2, 12, 13, 14, 15Counter Load Operation Counter Reset OperationCounter Increment Operation Counter Hold OperationRetransmit Mask Reset OperationMask Readback Operation Counting by TwoCLK Cnten ADS Cntrst MrstIeee 1149.1 Serial Boundary Scan Jtag Performing a TAP ResetPerforming a Pause/Restart Boundary Scan Hierarchy for 9-Mbit DeviceInstruction Identification Codes Scan Registers Sizes Register Name Bit SizeInstruction Code Description Maximum Ratings Electrical CharacteristicsOperating Range CapacitanceSwitching Characteristics Master Reset Timing DelaysJtag Timing and Switching Waveforms Read Cycle12, 30, 31, 32 Switching WaveformsBank Select Read34 Read-to-Write-to-Read OE Controlled33, 36, 38 Write with Address Counter Advance39 Readback State of Address Counter or Mask Register43, 44, 45 Rport LportCounter Interrupt and Retransmit 15, 42, 50, 51, 52 Deselected Outputs DisabledWrite Read512K × 18 9M 3.3V Synchronous CY7C0833AV Dual-Port Sram Ordering Information128K × 18 2M 3.3V Synchronous CY7C0831AV Dual-Port Sram 64K × 18 1M 3.3V Synchronous CY7C0830AV Dual-Port Sram32K × 18 512K 3.3V Synchronous CY7C0837AV Dual-Port Sram Package DiagramsPin Thin Quad Flatpack 14 x 14 x 1.4 mm Document History Worldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal InformationUSB

CY7C0837AV, CY7C0833AV, CY7C0831AV, CY7C0830AV, CY7C0832AV specifications

Cypress Semiconductor, a leader in innovative semiconductor solutions, has developed a range of high-performance SRAM (Static Random Access Memory) products, including the CY7C0837AV, CY7C0833AV, CY7C0831AV, CY7C0830AV, and CY7C0832AV. These devices cater to various applications requiring fast, reliable memory storage.

One of the main features of these SRAMs is their speed. They offer fast access times, which range from 10 to 15 nanoseconds. This rapid access is critical for applications where speed is essential, such as high-speed networking and telecommunications equipment, automotive systems, and industrial controls. The CY7C0837AV, for instance, boasts a 1 Mbit memory capacity, making it suitable for applications requiring a larger data buffer.

Another notable feature of these devices is their low power consumption. The SRAMs are designed to operate at low voltages, typically around 3.3V, which greatly reduces the overall power requirements. This characteristic is particularly advantageous for battery-operated devices and portable electronics, as it extends battery life and improves energy efficiency.

Cypress's SRAM offerings incorporate advanced technologies like asynchronous read and write operations, which enable users to access memory without the need for a clock signal. This asynchronous nature allows for simpler system designs and integration, significantly reducing component count and complexity.

In terms of packaging, these SRAMs are available in various formats, including standard DIP and surface-mount options, facilitating easy integration into a range of printed circuit boards. Their footprint and compatibility with existing designs ensure they can be utilized in both new developments and legacy system enhancements.

The CY7C0837AV, CY7C0833AV, CY7C0831AV, CY7C0830AV, and CY7C0832AV also support burst mode operations, allowing for faster sequential data access. This feature enhances performance in applications that require continuous data streams, such as video processing and signal processing tasks.

In summary, the Cypress CY7C0837AV, CY7C0833AV, CY7C0831AV, CY7C0830AV, and CY7C0832AV SRAMs provide a combination of high speed, low power consumption, and versatile packaging options. Their advanced technologies and characteristics make them ideal for a wide range of applications, from automotive to industrial systems, solidifying their position as reliable memory solutions in the semiconductor market.