Cypress CY62157EV30 manual Product Portfolio, Pin Configuration

CY62157EV30 MoBL®

Product Portfolio

Power Dissipation

VCC Range (V)

Speed

Operating ICC, (mA)

Standby, ISB2

Product

Range

(ns)

f = 1MHz

f = fmax

(∝A)

Min

Typ [2]

Max

Typ [2]

Max

Typ [2]

Max

Typ [2]

Max

CY62157EV30LL

Ind’l/Auto-A

2.2V

3.0

3.6

45

1.8

3

18

25

2

8

Pin Configuration

The following pictures show the 44-pin TSOP II and 48-pin TSOP I pinouts.[3, 4, 5]

44-Pin TSOP II

Top View

		A4	1	44			A5
		A3	2	43		A6
		A2	3	42			A7
		A1	4	41
							OE
		A0	5	40			BHE
			6	39		BLE
		CE
	IO0		7	38			IO15
	IO1		8	37		IO14
	IO2		9	36			IO13
	IO3		10	35			IO12
VCC			11	34		VSS
VSS			12	33			V
	IO4		13	32			CC
						IO
	IO5		14	31			IO1110
	IO6		15	30			IO9
	IO7		16	29		IO
			17	28		8
	WE						A
	A18		18	27		A8
	A17		19	26			A910
	A16		20	25			A
	A15		21	24		A11
	A14		22	23		12
						A
					13

48-Pin TSOP I (512K x 16 / 1M x 8)

Top View

A15	1	48	A16
A14	2	47
			BYTE
A13	3	46	Vss
A12	4	45	IO15/A19
A11	5	44	IO7
A10	6	43	IO14
A9	7	42	IO6
A8	8	41	IO13
NC	9	40	IO5
DNU	10	39	IO12
WE	11	38	IO4
CE2	12	37	Vcc
DNU	13	36	IO11
BHE	14	35	IO3
BLE	15	34	IO10
A18	16	33	IO2
A17	17	32	IO9
A7	18	31	IO1
A6	19	30	IO8
A5	20	29	IO0
A4	21	28	OE
A3	22	27	Vss
A2	23	26	CE1
A1	24	25	A0

Notes

2.Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25°C.

3.NC pins are not connected on the die.

4.The 44-TSOP II package has only one chip enable (CE) pin.

5.The BYTE pin in the 48-TSOP I package has to be tied HIGH to use the device as a 512K × 16 SRAM. The 48-TSOP I package can also be used as a 1M × 8 SRAM by tying the BYTE signal LOW. In the 1M x 8 configuration, Pin 45 is A19, while BHE, BLE and IO8 to IO14 pins are not used (DNU).

Document #: 38-05445 Rev. *E Page 2 of 14

[+] Feedback