Motorola MVME197LE manual Requirements

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Board Level Hardware Description

The BusSwitch ASIC provides an interface between the processor bus (MC88110 bus) and the local peripheral bus (MC68040 compatible bus). Refer to the MVME197LE block diagram (Figure 1-1). It provides bus arbitration for the MC88110 bus and serves as a seven level interrupt handler. It has programmable map decoders for both busses, as well as write post buffers on each, two tick timers, and four 32-bit general purpose registers.

The DCAM (DRAM Controller and Address Multiplexer) ASIC provides the address multiplexers and RAS/CAS/WRITE control for the DRAM as well as data control for the ECDM.

The ECDM (Error Correction and Data Multiplexer) ASIC multiplexes between four data paths on the DRAM array. Since the device handles 16 bits, four such devices are required on the MVME197LE to accommodate the 64-bit data bus of the MC88110 microprocessor. Single-bit error correction and double-bit detection is performed in the ECDM.

The PCCchip2 (Peripheral Channel Controller) ASIC provides two tick timers and the interface to the LAN chip, the SCSI chip, the serial port chip, the printer port, and the BBRAM (Battery Backup RAM).

A VMEbus interface chip with an MC68040 bus interface is one ASIC called the VMEchip2. The VMEchip2 includes two tick timers, a watchdog timer, programmable map decoders for the master and slave interfaces, and a VMEbus to/from the local peripheral bus DMA controller, a VMEbus to/from the local peripheral bus non-DMA programmed access interface, a VMEbus interrupter, a VMEbus system controller, a VMEbus interrupt handler, and a VMEbus requester.

Local peripheral bus to VMEbus transfers can be D8, D16, or D32. VMEchip2 DMA transfers to the VMEbus, however, can be 64 bits wide as Block Transfer (BLT).

Requirements

These boards are designed to conform to the requirements of the following documents:

VMEbus Specification (IEEE 1014-87)

EIA-232-D Serial Interface Specification, EIA

SCSI Specification, ANSI

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Installation Guide

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Contents MVME197LE Restricted Rights Legend Preface Document TerminologyBIT Related Documentation Document Title Motorola Publication NumberPage Page Safety Summary Safety Depends on YOU Contents Hardware Preparation and Installation Using the 197Bug Debugger Appendix a Configure and Environment Commands List of Figures Xiv List of Tables Xvi Introduction OverviewRequirements Features Specifications Block DiagramMVME197LE Specifications Block Diagram Mezzanine Address Bus Bus Data Bus 256 BusSwitchMC88110 Address Data MUX Address Memory ArrayFront Panel Switches and Indicators Functional DescriptionFlash Memory Data Bus StructureMC88110 MPU Onboard DramInterfaces Battery Backup RAM and ClockVMEbus Interface Serial Port InterfacePrinter Interface Ethernet InterfaceScsi Interface Scsi TerminationPeripheral Resources Interrupt Sources ConnectorsMemory Maps Processor Bus Memory MapProcessor Bus Memory Map DramsizeAddress Range Devices Accessed Port Size Local Devices Memory MapVMEbus Accesses to the Local Peripheral Bus VMEbus Memory MapVMEbus Short I/O Memory Map Unpacking Instructions Hardware PreparationHardware Preparation and Installation VMEbus Connector P1 Configuration Switches Switch S1Configuration Switch S1 General Information S1-1 to S1-8 OFF -- All Ones Factory Configuration Installation Instructions Switch S6MVME197LE Module Installation System Considerations MVME197LEIG/D1 Hardware Preparation and Installation Overview of M88000 Firmware Description of 197BugInstallation and Start-up Comparison With M68000-Based Firmware197Bug Implementation Terminal to make sure XON/XOFF handshaking is enabled OteAutoboot ROMboot Network BootReset Restarting the SystemAbort BreakMemory Requirements SYSFAIL* Assertion/NegationMPU Clock Speed Calculation Terminal Input/Output Control DELDisk I/O Support Blocks Versus SectorsDevice Probe Function Disk I/O via 197Bug Commands Disk I/O via 197Bug System Calls DskcfigDefault 197Bug Controller and Device Parameters Disk I/O Error CodesNetwork I/O Support UDP/IP Protocol Modules Bootp Protocol ModulePhysical Layer Manager Ethernet Driver RARP/ARP Protocol ModulesMultiprocessor Support Network Boot Control ModuleNetwork I/O Error Codes Multiprocessor Control Register Mpcr MethodMpar Diagnostic Facilities Gcsr MethodDebugger General Information Entering Debugger Command Lines DebuggerSyntactic Variables Expression as a ParameterData Type Base Identifier Examples Address as a Parameter Address FormatsOffset Registers Entering and Debugging Programs Port Numbers197Bug Vector Table and Workspace Calling System Utilities From User ProgramsPreserving The Debugger Operating Environment Hardware FunctionsFloating Point Support CPU/MPU RegistersSingle Precision Real Double Precision RealScientific Notation 197Bug Debugger Command Set Debugger CommandsNocm Noma Name Nioc RL Addrbhw Using the 197Bug Debugger Configure Board Information Block Cnfg MISet Environment to Bug/Operating System ENV DTable A-1. ENV Command Parameters ENV Parameter and Options Default Meaning of DefaultConfigure and Environment Commands Ffbffffc Table A-1. ENV Command Parameters Memory Requirement s 01FFFFFF Table A-1. ENV Command Parameters Efffffff FF7FFFFF Table A-1. ENV Command Parameters Table A-1. ENV Command Parameters Table A-1. ENV Command Parameters DISK/TAPE Controller Data Disk/Tape Controller Modules SupportedMVME320 4 Devices Disk/Tape Controller Default ConfigurationsSingle Board Computers 7 Devices MVME323 4 DevicesMVME327A 9 Devices MVME328 14 DevicesMVME350 1 Device IOT Command Parameters for Supported Floppy Types IOT ParameterDisk/Tape Controller Data Network Controller Data Network Controller Modules SupportedNetwork Controller Data Symbols NumericsIN-2 IN-3 Nvram A-2 XON/XOFF Index
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