SDI Technologies SDIO Card manual Card Detect Resistor, Timings, Combo Card 4-bit Control

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SDIO Simplified Specification Version 2.00

 

©Copyright 2000-2007 SD Card Association

 

 

 

 

 

 

 

 

 

 

I/O

 

Memory

Control Method

 

 

Initialized

 

Not

CCCR

 

 

 

 

Initialized

 

 

 

Not

 

Initialized

ACMD6

 

 

Initialized

 

 

 

 

 

Initialized

 

Initialized

CCCR & ACMD6

 

Table 4-4 Combo Card 4-bit Control

As shown in Table 4-4, if only the I/O function of a combo card is active, only writing to the CCCR is required change the bus width mode. If only memory is active then ACMD6 is all that is needed to change bus widths. If both I/O and Memory are active then both CCCR and ACMD6 are needed to change the bus width. In the combo card, both the memory and I/O controllers shall be set to the same bus width

Note that Low-Speed SDIO cards support 4-bit transfer as an option. When communicating with a Low-Speed SDIO card, the host shall first determine if the card supports 4-bit transfer prior to attempting to select that mode.

If a Combo card supports the lock/unlock operation, it cannot change bus width of a locked card and returns an illegal command error to a bus width switch command. The host needs to unlock the card by CMD42 before changing bus width. This also implies that the host should not change bus width during initialization before managing a locked card.

4.6Card Detect Resistor

SD memory and I/O cards use a pull-up resistor on DAT[3] to detect card insertion. The procedure to enable/disable this resistor is different between SD memory and SDIO. SD memory uses ACMD42 to control this resistor while SDIO uses writes to the CCCR using CMD52. In the case of a combo card, both control locations exist and shall be managed by the host. For a combo card, the resistor is enabled only when both the memory and the I/O control registers have the resistor enabled. That is, after a power on, the host shall disable the resistor using ACMD42 to the memory controller or a CCCR write to the SDIO controller since the resistor enable is a logical AND of the two enables. Table 4-5 shows the effect of each resistor enable on the card’s resistor. After power-up, both locations default to resistor enabled. Note that after an I/O reset, the I/O resistor enable is not changed. Note that the SDIO Specification Version 1.00 required that both the SDIO and Memory resistor be disabled in order for the resistor to actually be disabled (logical OR of the 2 enables). Combo cards built to that specification require the host to disable both enables. It is recommended the host disable both enables of any combo card to avoid problems with the difference between 1.0 and current specification based cards.

I/O Resistor

Memory Resistor

Enabled

Enabled

Enabled

Disabled

Disabled

Enabled

Disabled

Disabled

Card Resistor

Resistor Connected

Resistor Disconnected

Resistor Disconnected

Resistor Disconnected

Table 4-5 Card Detect Resistor States

4.7Timings

This section is not included in the Simplified Specification.

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Contents SD Specifications Part E1 Sdio Simplified Specification Date Version Sdio Simplified Specification VersionChanges compared to previous issue Release of SD Simplified Specification Conventions Used in This Document Table of Contents SPI and SD 1-bit Mode Interrupts 16.2 Table of Tables Table of Figures Primary Reference Document Sdio FeaturesGeneral Description Standard Sdio FunctionsSdio Card modes Sdio Signaling DefinitionSdio Card Types Sdio Host ModesSignal Pins Signal connection to two 4-bit Sdio cardsDifferences in I/O card Initialization ResetSdio Card Initialization Sdio Simplified Specification Version MEM=0 Card initialization flow in SD mode Sdio aware host Illegal Command F8=0 Card initialization flow in SPI mode Sdio aware host OCR Values for CMD5 Iosendopcond Command CMD5VDD Voltage Window Position OCR bitResponse R4 in SD mode Iosendopcond Response R4Special Initialization considerations for Combo Cards Acceptable Commands after InitializationRecommendations for RCA after Reset Re-initialize both I/O and MemoryRe-Initialization Flow for I/O Controller Re-Initialization Flow for Memory controllerEnabling CRC in SPI Combo Card Unsupported SD Memory Commands Differences with SD Memory SpecificationSdio Command List Bus Width Reset for SdioModified R6 Response Combo Card 4-bit Control Card Detect ResistorTimings Card Detect Resistor StatesChanges to SD Memory Fixed Registers Data Transfer Block SizesData Transfer Abort Read AbortCSD Register OCR RegisterCID Register RCA RegisterBit Identifier Type Value Description Sdio Status Register StructureClear New I/O Read/Write Commands Iorwdirect Command CMD52Iorwdirect Response R5 ComcrcerrorIllegalcommand 1 CMD52 Response SD modesCMD=DAT lines free DIS=DisabledIdentifier Type Value Description Clear Condition TRN=TransferOP code Command operation Iorwextended Command CMD53Iorw Extended command Op Code Definition CRCByte Count Values 1 CMD53 Data Transfer FormatOverview Register Access TimeSdio Card Internal Operation InterruptsCMD52 During Data Transfer Suspend/ResumeRead Wait Sdio Fixed Internal MapCommon I/O Area CIA Card Common Control Registers CccrCCCR/SDIO Card Common Control Registers CccrType IOE3To abort transfers to/from memory Scsi 4BLS Transaction of function 0 CIA Cccr bit Definitions EmpcFunction Basic Information Registers FBR Function Basic Registers FBRAddress Field TypeSdio Simplified Specification Version Field Type FBR bit and field definitionsMultiple Function Sdio Cards Setting Block Size with CMD53Card Information Structure CIS Card Information Structure CIS and reserved area of CIABus State Diagram State Diagram for Bus State MachineCSA Data Format CSA AccessEmbedded I/O Code Storage Area CSA Sdio Interrupts Interrupt TimingTerminated Data Transfer Interrupt Cycle Interrupt Clear TimingSdio Suspend/Resume Operation Sdio Read Wait Operation Power Control support for Sdio Cards Power ControlPower Control Overview Master Power ControlHigh-Power Tuples Power Control Support for the Sdio HostPower Selection Reference Tuples by Master Power Control and Power SelectPower Control Operation Switching Bus Speed Mode in a Combo Card High-Speed ModeSdio High-Speed Mode Sdio Power Sdio Physical PropertiesSdio Simplified Specification Version Inrush Current Limiting Basic Tuple Format and Tuple Chain Structure CIS FormatsCIS Reference Document Byte Order Within TuplesTuples Supported by Sdio Cards Tuple VersionSdio Card Metaformat Code Name DescriptionCistplmanfid Manufacturer Identification Tuple Cistplmanfid Manufacturer Identification String TupleSdio Specific Extensions Cistplfuncid Function Identification TupleCistplfunce Tuple for Function 0 common Cistplfunce Function Extension TupleCistplfunce Tuple General Structure Tplfidfunction Tuple for Function 0 commonByte Cistplfunce Tuple for FunctionTplfidfunction Tuple for Function Sdio Simplified Specification Version 11 Tplfecsaproperty Definition Tplfidfunction Field Descriptions for Functions10 Tplfefunctioninfo Definition Bit NameCistplsdioext Tuple Reserved for Sdio Cards Cistplsdiostd Function is a Standard Sdio Function12 Cistplsdiostd Tuple Reserved for Sdio Cards 13 Cistplsdioext Tuple Reserved for Sdio CardsNormative SD and SPI Command ListTable A-14 SD Mode Command List Table A-15 SPI Mode Command List Sdmem SdioAppendix B Normative ReferencesAppendix C Abbreviations and TermsLOW, High Informative
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