SDI Technologies SDIO Card manual Sdio Simplified Specification Version

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©Copyright 2000-2007 SD Card Association

SDIO Simplified Specification Version 2.00

An SDIO aware host sends CMD5 prior to the CMD55/ACMD41 pair, and thus would receive a valid OCR in the R4 response to CMD5 and continue to initialize the card. Figure 3-2 shows the operation of an SDIO aware host operating in the SD modes and Figure 3-3 shows the same operation for a host that operates in the SPI mode.

If the I/O portion of a card has received no CMD5, the I/O section remains inactive and shall not respond to any command except CMD5. A combo card stays in the memory-only mode. If no memory is installed on the card (i.e. an I/O only card in a non-SDIO aware host) the card would not respond to any memory command. This satisfies the condition where a user uses some I/O function on the card such as Ethernet to load a music file to the memory function of that card. The card is then removed and inserted into a non-SDIO aware host. That host would not enable the I/O function (no CMD5) so would appear to the player as a memory-only card. If the host were I/O aware, it would send the CMD5 to the card and the card would respond with R4. The host reads that R4 value and knows the number of available I/O functions and about the existence of any SD memory.

After the host has initialized the I/O portion of the card, it then reads the Common Information Area (CIA) of the card (see 6.8). This is done by issuing a read command, starting with the byte at address 0x00, of I/O function 0. The CIA contains the Card Common Control Registers (CCCR) and the Function Basic Registers (FBR). Also included in the CIA are pointers to the card’s common Card Information Structure (CIS) and each individual function’s CIS. The CIS structure is defined in section 16. The CIS includes information on power, function, manufacturer and other things the host needs to determine if the I/O function(s) is appropriate to power-up. If the host determines that the card should be activated, a register in the CCCR area enables the card and each individual function. At this time, all functions of the I/O card are fully available. In addition, the host can control the power consumption and enable/disable interrupts on a function-by-function basis. This access to I/O does not interfere with memory access to the card if present.

Combo Cards can accept CMD15 with RCA=0000, as described in, but there is an exception for SD memory only cards. Memory only cards require a non-zero RCA before the host may issue CMD15. Thus, CMD15 shall be issued after CMD3 in the Standby state. In the case of ACMD41, it shall accept RCA=0x0000.

As shown in Figure 3-2 and Figure 3-3, an SDIO aware host shall send CMD5 arg=0 as part of the initialization sequence after either Power On or a CMD 52 with write to I/O Reset. Sending CMD5 arg=0 that has not been preceded by one of these two reset conditions shall not result in either the host or card entering the initialization sequence.

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Contents SD Specifications Part E1 Sdio Simplified Specification Date Version Sdio Simplified Specification VersionChanges compared to previous issue Release of SD Simplified Specification Conventions Used in This Document Table of Contents SPI and SD 1-bit Mode Interrupts 16.2 Table of Tables Table of Figures Primary Reference Document Sdio FeaturesGeneral Description Standard Sdio FunctionsSdio Card modes Sdio Signaling DefinitionSdio Card Types Sdio Host ModesSignal Pins Signal connection to two 4-bit Sdio cardsDifferences in I/O card Initialization ResetSdio Card Initialization Sdio Simplified Specification Version MEM=0 Card initialization flow in SD mode Sdio aware host Illegal Command F8=0 Card initialization flow in SPI mode Sdio aware host OCR Values for CMD5 Iosendopcond Command CMD5VDD Voltage Window Position OCR bitResponse R4 in SD mode Iosendopcond Response R4Special Initialization considerations for Combo Cards Acceptable Commands after InitializationRecommendations for RCA after Reset Re-initialize both I/O and MemoryRe-Initialization Flow for I/O Controller Re-Initialization Flow for Memory controllerEnabling CRC in SPI Combo Card Unsupported SD Memory Commands Differences with SD Memory SpecificationSdio Command List Bus Width Reset for SdioModified R6 Response Combo Card 4-bit Control Card Detect ResistorTimings Card Detect Resistor StatesChanges to SD Memory Fixed Registers Data Transfer Block SizesData Transfer Abort Read AbortCSD Register OCR RegisterCID Register RCA RegisterBit Identifier Type Value Description Sdio Status Register StructureClear New I/O Read/Write Commands Iorwdirect Command CMD52Iorwdirect Response R5 ComcrcerrorIllegalcommand 1 CMD52 Response SD modesCMD=DAT lines free DIS=DisabledIdentifier Type Value Description Clear Condition TRN=TransferOP code Command operation Iorwextended Command CMD53Iorw Extended command Op Code Definition CRCByte Count Values 1 CMD53 Data Transfer FormatOverview Register Access TimeSdio Card Internal Operation InterruptsCMD52 During Data Transfer Suspend/ResumeRead Wait Sdio Fixed Internal MapCommon I/O Area CIA Card Common Control Registers CccrCCCR/SDIO Card Common Control Registers CccrType IOE3To abort transfers to/from memory Scsi 4BLS Transaction of function 0 CIA Cccr bit Definitions EmpcFunction Basic Information Registers FBR Function Basic Registers FBRAddress Field TypeSdio Simplified Specification Version Field Type FBR bit and field definitionsMultiple Function Sdio Cards Setting Block Size with CMD53Card Information Structure CIS Card Information Structure CIS and reserved area of CIABus State Diagram State Diagram for Bus State MachineCSA Data Format CSA AccessEmbedded I/O Code Storage Area CSA Sdio Interrupts Interrupt TimingTerminated Data Transfer Interrupt Cycle Interrupt Clear TimingSdio Suspend/Resume Operation Sdio Read Wait Operation Power Control support for Sdio Cards Power ControlPower Control Overview Master Power ControlHigh-Power Tuples Power Control Support for the Sdio HostPower Selection Reference Tuples by Master Power Control and Power SelectPower Control Operation Switching Bus Speed Mode in a Combo Card High-Speed ModeSdio High-Speed Mode Sdio Power Sdio Physical PropertiesSdio Simplified Specification Version Inrush Current Limiting Basic Tuple Format and Tuple Chain Structure CIS FormatsCIS Reference Document Byte Order Within TuplesTuples Supported by Sdio Cards Tuple VersionSdio Card Metaformat Code Name DescriptionCistplmanfid Manufacturer Identification Tuple Cistplmanfid Manufacturer Identification String TupleSdio Specific Extensions Cistplfuncid Function Identification TupleCistplfunce Tuple for Function 0 common Cistplfunce Function Extension TupleCistplfunce Tuple General Structure Tplfidfunction Tuple for Function 0 commonByte Cistplfunce Tuple for FunctionTplfidfunction Tuple for Function Sdio Simplified Specification Version 11 Tplfecsaproperty Definition Tplfidfunction Field Descriptions for Functions10 Tplfefunctioninfo Definition Bit NameCistplsdioext Tuple Reserved for Sdio Cards Cistplsdiostd Function is a Standard Sdio Function12 Cistplsdiostd Tuple Reserved for Sdio Cards 13 Cistplsdioext Tuple Reserved for Sdio CardsNormative SD and SPI Command ListTable A-14 SD Mode Command List Table A-15 SPI Mode Command List Sdmem SdioAppendix B Normative ReferencesAppendix C Abbreviations and TermsLOW, High Informative
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