SDI Technologies SDIO Card manual Suspend/Resume, Read Wait, CMD52 During Data Transfer

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©Copyright 2000-2007 SD Card Association

SDIO Simplified Specification Version 2.00

6.4Suspend/Resume

Within a multi-function SDIO or a Combo card, there are multiple devices (I/O and memory) that share access to the SD bus. In order to allow the sharing of access to the host among multiple devices, SDIO and combo cards can implement the optional concept of suspend/resume. If a card supports suspend/resume, the host may temporarily halt a data transfer operation to one function or memory (suspend) in order to free the bus for a higher priority transfer to a different function or memory. Once this higher-priority transfer is complete, the original transfer is re-started where it left off (resume). Support of suspend/resume is optional on a per-card basis. If suspend/resume is implemented, it shall be supported by the memory (if any) of a Combo card and all I/O functions except 0 (the CIA). Note that the host can suspend multiple transactions and resume them in any order desired. I/O function 0 does not support suspend/resume. Suspend/Resume is described in more detail in section 9. Any card that supports Suspend/Resume shall also support Read Wait and Direct Commands (SRW and SDC = 1) Note that Suspend/Resume is defined only for the SD 1 and 4-bit modes. It does not apply to SPI transfers.

6.5Read Wait

Host devices built to the SD Physical Specification shall control the SDCLK to stop the read data block output from a card executing a multiple read command whenever the host cannot accept more data. During the time that the host has stopped the SDCLK, a CMD52 cannot be issued. This limitation causes a problem in that a host device built to the SD Physical Specification cannot perform the I/O command during a multiple read cycle.

In order to eliminate this limitation, the SDIO Specification adds the Read Wait control to enable the host to issue CMD52 during a multiple read cycle. Read Wait uses the DAT[2] line to allow the host to signal the card to temporarily halt the sending of read data by a card. This feature is optional for an SDIO or combo card. However, if an SDIO or combo supports Read Wait, all functions and any memory shall support Read Wait. Read Wait is described in more detail in section 10. Any card that supports Suspend/Resume shall also support Read Wait. Note that Read Wait is defined only for the SD 1 and 4-bit modes. It does not apply to SPI transfers.

6.6CMD52 During Data Transfer

A card may accept CMD52 during data transfer if it supports Direct Commands (see SDC, Table 6-3). For both SD and SPI modes, if an error occurs during data transfer the SDIO card shall accept CMD52 to allow I/O abort and reset regardless of this bit value of the value of SDC.

6.7SDIO Fixed Internal Map

The SDIO card has a fixed internal register space and a function unique area. The fixed area contains information about the card and certain mandatory and optional registers in fixed locations. The fixed locations allow any host to obtain information about the card and perform simple operations such as enable in a common manner. The function unique area is a per-function area, which is defined either by the Application Specifications for Standard SDIO functions or by the vendor for non-standard functions. Figure 6-1 shows the internal map of an SDIO card with multiple functions.

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Contents SD Specifications Part E1 Sdio Simplified Specification Sdio Simplified Specification Version Changes compared to previous issueDate Version Release of SD Simplified Specification Conventions Used in This Document Table of Contents SPI and SD 1-bit Mode Interrupts 16.2 Table of Tables Table of Figures Sdio Features General DescriptionPrimary Reference Document Standard Sdio FunctionsSdio Signaling Definition Sdio Card TypesSdio Card modes Sdio Host ModesSignal Pins Signal connection to two 4-bit Sdio cardsReset Sdio Card InitializationDifferences in I/O card Initialization Sdio Simplified Specification Version MEM=0 Card initialization flow in SD mode Sdio aware host Illegal Command F8=0 Card initialization flow in SPI mode Sdio aware host Iosendopcond Command CMD5 VDD Voltage Window PositionOCR Values for CMD5 OCR bitResponse R4 in SD mode Iosendopcond Response R4Acceptable Commands after Initialization Recommendations for RCA after ResetSpecial Initialization considerations for Combo Cards Re-initialize both I/O and MemoryRe-Initialization Flow for I/O Controller Re-Initialization Flow for Memory controllerEnabling CRC in SPI Combo Card Differences with SD Memory Specification Sdio Command ListUnsupported SD Memory Commands Reset for Sdio Modified R6 ResponseBus Width Card Detect Resistor TimingsCombo Card 4-bit Control Card Detect Resistor StatesData Transfer Block Sizes Data Transfer AbortChanges to SD Memory Fixed Registers Read AbortOCR Register CID RegisterCSD Register RCA RegisterSdio Status Register Structure ClearBit Identifier Type Value Description New I/O Read/Write Commands Iorwdirect Command CMD52Comcrcerror IllegalcommandIorwdirect Response R5 1 CMD52 Response SD modesDIS=Disabled Identifier Type Value Description Clear ConditionCMD=DAT lines free TRN=TransferIorwextended Command CMD53 Iorw Extended command Op Code DefinitionOP code Command operation CRCByte Count Values 1 CMD53 Data Transfer FormatRegister Access Time Sdio Card Internal OperationOverview InterruptsSuspend/Resume Read WaitCMD52 During Data Transfer Sdio Fixed Internal MapCommon I/O Area CIA Card Common Control Registers CccrCard Common Control Registers Cccr TypeCCCR/SDIO IOE3To abort transfers to/from memory Scsi 4BLS Transaction of function 0 CIA Cccr bit Definitions EmpcFunction Basic Registers FBR AddressFunction Basic Information Registers FBR Field TypeSdio Simplified Specification Version Field Type FBR bit and field definitionsSetting Block Size with CMD53 Card Information Structure CISMultiple Function Sdio Cards Card Information Structure CIS and reserved area of CIABus State Diagram State Diagram for Bus State MachineCSA Access Embedded I/O Code Storage Area CSACSA Data Format Sdio Interrupts Interrupt TimingTerminated Data Transfer Interrupt Cycle Interrupt Clear TimingSdio Suspend/Resume Operation Sdio Read Wait Operation Power Control Power Control OverviewPower Control support for Sdio Cards Master Power ControlPower Control Support for the Sdio Host Power SelectionHigh-Power Tuples Reference Tuples by Master Power Control and Power SelectPower Control Operation High-Speed Mode Sdio High-Speed ModeSwitching Bus Speed Mode in a Combo Card Sdio Power Sdio Physical PropertiesSdio Simplified Specification Version Inrush Current Limiting CIS Formats CIS Reference DocumentBasic Tuple Format and Tuple Chain Structure Byte Order Within TuplesTuple Version Sdio Card MetaformatTuples Supported by Sdio Cards Code Name DescriptionCistplmanfid Manufacturer Identification String Tuple Sdio Specific ExtensionsCistplmanfid Manufacturer Identification Tuple Cistplfuncid Function Identification TupleCistplfunce Function Extension Tuple Cistplfunce Tuple General StructureCistplfunce Tuple for Function 0 common Tplfidfunction Tuple for Function 0 commonCistplfunce Tuple for Function Tplfidfunction Tuple for FunctionByte Sdio Simplified Specification Version Tplfidfunction Field Descriptions for Functions 10 Tplfefunctioninfo Definition11 Tplfecsaproperty Definition Bit NameCistplsdiostd Function is a Standard Sdio Function 12 Cistplsdiostd Tuple Reserved for Sdio CardsCistplsdioext Tuple Reserved for Sdio Cards 13 Cistplsdioext Tuple Reserved for Sdio CardsSD and SPI Command List Table A-14 SD Mode Command ListNormative Table A-15 SPI Mode Command List Sdmem SdioAppendix B Normative ReferencesAppendix C Abbreviations and TermsLOW, High Informative
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