SDI Technologies SDIO Card manual Data Transfer Block Sizes, Data Transfer Abort, Read Abort

Page 27

©Copyright 2000-2007 SD Card Association

SDIO Simplified Specification Version 2.00

4.8Data Transfer Block Sizes

SDIO cards may transfer data in either a multi-byte (1 to 512 bytes) or an optional block format, while the SD memory cards are fixed in the block transfer mode. The SD Physical Specification limits the block size for data transfer to powers of 2 (i.e. 512, 1024, 2048) unless using partial read and write. The SDIO Specification allows any block size from 1 byte to 2048 bytes in order to accommodate the various natural block sizes for I/O functions. Note that an SDIO card function may define a maximum block size or byte count in the CIS that is smaller than the maximum values described above.

4.9Data Transfer Abort

A host communicating with a SD memory card uses CMD12 to abort the transfer of read or write data to/from the card. For an SDIO card, CMD12 abort is replaced by a write to the ASx bits in the CCCR. Normally, the abort is used to stop an infinite block transfer (block count=0). If an exact number of blocks are to be transferred, it is recommended that the host issue a block command with the correct block count, rather than using an infinite count and aborting the data at the correct time.

4.9.1Read Abort

The host may issue an I/O abort by writing to the CCCR at any time during I/O extended read operation. The data transmission stops 2 clocks cycles after the end bit of the I/O abort command, even If the card has already begun transferring an unwanted data block while the host is issuing the abort.

The rest of this section is not included in the Simplified Specification.

4.9.2Write Abort

The host may issue an I/O abort by writing to the CCCR at any time between data blocks during I/O extended write operation. In this case, the final block transfer (including the CRC response from the card) shall have been completed. This requires that the end bit of the I/O abort command should appear a maximum of two clocks before the end bit of the CRC response to the last data block. Note that the I/O abort command may be sent any time after the CRC response to the last data block. The host shall not abort in the middle of a write block. After the I/O abort is sent to the card, the card signals ‘Busy’ (by pulling DAT[0] line to ‘0’) until it has finished processing the last transferred data block. During that Busy period, the host may release the bus by writing to the CCCR BR bit. There exist some special cases when the abort is issued near the end of the CRC response to a write multiple command.

The rest of this section is not included in the Simplified Specification.

4.10Changes to SD Memory Fixed Registers

The SD Physical Specification Version 1.01 defines 7 fixed card registers. They are:

1.OCR Register (32 bits)

2.CID Register (128 bits)

3.CSD Register (128 bits)

4.RCA Register (16 bits)

5.DSR Register (16 bits, optional)

6.SCR Register (64 bits)

7.SD_CARD_STATUS (512 bits)

In addition, within an SD memory card there is a status register whose value is returned to the host in the form of several responses (i.e. the R1b response). An SDIO only card eliminates some registers and changes some of the bits in the remaining registers. The description of these register changes follows:

18

Page 26 Page 28
Image 27
Page 26 Page 28
Contents SD Specifications Part E1 Sdio Simplified Specification Sdio Simplified Specification Version Changes compared to previous issueDate Version Release of SD Simplified Specification Conventions Used in This Document Table of Contents SPI and SD 1-bit Mode Interrupts 16.2 Table of Tables Table of Figures Standard Sdio Functions Sdio FeaturesGeneral Description Primary Reference DocumentSdio Host Modes Sdio Signaling DefinitionSdio Card Types Sdio Card modesSignal connection to two 4-bit Sdio cards Signal PinsReset Sdio Card InitializationDifferences in I/O card Initialization Sdio Simplified Specification Version MEM=0 Card initialization flow in SD mode Sdio aware host Illegal Command F8=0 Card initialization flow in SPI mode Sdio aware host OCR bit Iosendopcond Command CMD5VDD Voltage Window Position OCR Values for CMD5Iosendopcond Response R4 Response R4 in SD modeRe-initialize both I/O and Memory Acceptable Commands after InitializationRecommendations for RCA after Reset Special Initialization considerations for Combo CardsRe-Initialization Flow for Memory controller Re-Initialization Flow for I/O ControllerEnabling CRC in SPI Combo Card Differences with SD Memory Specification Sdio Command ListUnsupported SD Memory Commands Reset for Sdio Modified R6 ResponseBus Width Card Detect Resistor States Card Detect ResistorTimings Combo Card 4-bit ControlRead Abort Data Transfer Block SizesData Transfer Abort Changes to SD Memory Fixed RegistersRCA Register OCR RegisterCID Register CSD RegisterSdio Status Register Structure ClearBit Identifier Type Value Description Iorwdirect Command CMD52 New I/O Read/Write Commands1 CMD52 Response SD modes ComcrcerrorIllegalcommand Iorwdirect Response R5TRN=Transfer DIS=DisabledIdentifier Type Value Description Clear Condition CMD=DAT lines freeCRC Iorwextended Command CMD53Iorw Extended command Op Code Definition OP code Command operation1 CMD53 Data Transfer Format Byte Count ValuesInterrupts Register Access TimeSdio Card Internal Operation OverviewSdio Fixed Internal Map Suspend/ResumeRead Wait CMD52 During Data TransferCard Common Control Registers Cccr Common I/O Area CIAIOE3 Card Common Control Registers CccrType CCCR/SDIOTo abort transfers to/from memory Scsi 4BLS Transaction of function 0 CIA Empc Cccr bit DefinitionsField Type Function Basic Registers FBRAddress Function Basic Information Registers FBRFBR bit and field definitions Sdio Simplified Specification Version Field TypeCard Information Structure CIS and reserved area of CIA Setting Block Size with CMD53Card Information Structure CIS Multiple Function Sdio CardsState Diagram for Bus State Machine Bus State DiagramCSA Access Embedded I/O Code Storage Area CSACSA Data Format Interrupt Timing Sdio InterruptsInterrupt Clear Timing Terminated Data Transfer Interrupt CycleSdio Suspend/Resume Operation Sdio Read Wait Operation Master Power Control Power ControlPower Control Overview Power Control support for Sdio CardsReference Tuples by Master Power Control and Power Select Power Control Support for the Sdio HostPower Selection High-Power TuplesPower Control Operation High-Speed Mode Sdio High-Speed ModeSwitching Bus Speed Mode in a Combo Card Sdio Physical Properties Sdio PowerSdio Simplified Specification Version Inrush Current Limiting Byte Order Within Tuples CIS FormatsCIS Reference Document Basic Tuple Format and Tuple Chain StructureCode Name Description Tuple VersionSdio Card Metaformat Tuples Supported by Sdio CardsCistplfuncid Function Identification Tuple Cistplmanfid Manufacturer Identification String TupleSdio Specific Extensions Cistplmanfid Manufacturer Identification TupleTplfidfunction Tuple for Function 0 common Cistplfunce Function Extension TupleCistplfunce Tuple General Structure Cistplfunce Tuple for Function 0 commonCistplfunce Tuple for Function Tplfidfunction Tuple for FunctionByte Sdio Simplified Specification Version Bit Name Tplfidfunction Field Descriptions for Functions10 Tplfefunctioninfo Definition 11 Tplfecsaproperty Definition13 Cistplsdioext Tuple Reserved for Sdio Cards Cistplsdiostd Function is a Standard Sdio Function12 Cistplsdiostd Tuple Reserved for Sdio Cards Cistplsdioext Tuple Reserved for Sdio CardsSD and SPI Command List Table A-14 SD Mode Command ListNormative Sdmem Sdio Table A-15 SPI Mode Command ListNormative References Appendix BAbbreviations and Terms Appendix CLOW, High Informative
Top Page Image Contents