VXI SVM2608 user manual Determining the Register Address

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With a variety of systems and bridges that move the data between different bus types (i.e. VME to PCI, VXI to PCI, etc.), in order to assist the user in determining how data is ordered, a known floating point value of 0.12345678901234 is loaded at Power-Up in the Result Register for all channels. Channel 0 values are listed as an illustration:

0x3FBF

is written at address

0xC00028

0x9ADD

is written at address

0xC0002A

0x3746

is written at address

0xC0002C

0xF4C6

is written at address

0xC0002E

By reading the value from these addresses, the user can identify the type of DATA(BYTE) swapping that takes place in the system and modify their code accordingly. An example of how to do the swapping is presented in Appendix A.

DETERMINING THE REGISTER ADDRESS

A user wishes to set Channel 2 to the 1.0 V range. Data is to be captured linearly without the use of the low pass filter or timeout control and will trigger from the positive edge of data sent to Channel 2. To accomplish this, the user will access the Control Register for Channel 2 at register offset 0x0058. To determine the register address, this value must be added to the base address and A32 address of the module. In this example, it is assumed that the base address switches are set to 0x19, yielding a base address of 0x19000000. Since the user must write to a register, the function offset is 0x00C00000.

Register Address = Module Base Address + Function Offset + Register Offset

=0x19000000 + 0x00C00000 + 0x00000058

=0x19C00058

By observing the bits in the Control Register, it can be determined what data value should be sent:

0x58 (Channel 2 Offset)

 

 

 

Write

 

Reason

 

 

 

0

 

 

 

D15

 

 

 

 

 

 

 

 

 

0

 

 

 

D14

 

 

It is recommended that unused register bits

 

 

 

 

 

 

 

 

D13

 

0

 

have 0 written to them

 

 

 

 

 

 

 

0

 

 

 

D12

 

 

 

 

 

 

 

 

 

0

 

 

 

D11

 

 

Disables Timeout Control

 

 

 

 

 

0

 

Sets the Channel for Linear Acquisition

 

D10

 

 

 

 

 

 

 

0

 

 

 

D9

 

 

Sets the Channel for Voltage Mode

 

 

 

 

 

0

 

 

D8

 

 

 

 

 

 

 

 

 

 

 

 

0

 

 

 

D7

 

 

Sets the Channel for acquisition in the 1.0 V range

 

 

 

 

 

1

 

 

D6

 

 

 

 

 

 

 

1

 

 

 

D5

 

 

Disables the 20 kHz Filter on Channel 2

 

 

 

 

 

0

 

 

D4

 

 

 

 

 

 

 

0

 

Sets the channel to trigger on a Positive Slope

 

D3

 

 

 

 

 

 

 

0

 

 

 

D2

 

 

Selects Channel 2 as the Trigger Source

 

 

 

 

 

1

 

 

D1

 

 

 

 

 

 

 

0

 

 

 

D0

 

 

 

 

 

 

 

 

 

 

 

 

SVM2608 Programming

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Contents SVM2608 VXI Technology, Inc Table of Contents Self Test Command Restricted Rights Legend WarrantyLimitation of Warranty CertificationSteve Mauga, QA Manager EMCUse Proper Power Source Service should only be performed by qualified personnelTerms and Symbols Use Proper Power CordImproper Use Avoid Electric ShockGround the Product Operating ConditionsTechnical Support VXI Technology World HeadquartersVXI Technology Cleveland Instrument Division VXI Technology Lake Stevens Instrument DivisionVXI Technology, Inc SVM2608 Preface Overview IntroductionScale Triggering Acquiring DataDelayed Trigger Linear ModePre-Trigger Test Bus Fifo ModeCommands CalibrationsOption SVM2608 Block Diagram Physical Description SVM2608 Environmental SpecificationsCH1I+ GND CH3I+ Exttrigin CH0I CH2I Front Panel Interface WiringGND CH1I CH3I GNDMtbf SVM2608 SpecificationsOption 1 SVM2608-01 VXI Technology, Inc SVM2608 Introduction Setting the Chassis Backplane Jumpers Calculating System Power and Cooling RequirementsRotary Switch Locations Setting the Base AddressDivide Decimal ExampleMSB LSB Module INSTALLATION/REMOVAL Switch to C and the front switch toRegister Offset Device Memory MapsFunction Offset ReservedMS = Most Significant LS = Least Significant SVM2608 A32 Register MAP0x72 Command Register Channel 0x74 Databyte Ordering Determining the Register Address Description of Registers Accessing the RegistersSysfailctl EXT Trig Slope Force Trigger, Start Register 0x02 Read & WriteINTLVL2 HSTRIGSRC2Reserved TimeoutctlExternal Trigger Level 0x06 Read & Write ATTN-GAIN1-GAIN0 2WIREOHMS4WIREOHMS LINEAR/FIFOSample Rate 0x0E, 0x36, 0x5E, 0x86 Read & Write Sample Rate 0x0C, 0x34, 0x5C, 0x84 Read & WriteKHz Channels 0-3/5 MHz Channels 4-5 LPF Control This bit Sample Rate, High-Speed 0xAE, 0xD6 Read & Write Sample Rate, High-Speed 0xAC, 0xD4 Read & WriteTimeout 0x1C, 0x44, 0x6C, 0x94, 0xBC, 0xE4 Read & Write Fifo Data 0x26, 0x4E, 0x76, 0x9E, 0xC6, 0xEE Read Only Fifo Data 0x24, 0x4C, 0x74, 0x9C, 0xC4, 0xEC Read OnlyReserved Registers 0xF8 0xFC Trigger Delay = Measurement Commands Microprocessor CommandsCaptured Data Calculations Resistance Measurement Offset Method Self Test CommandResistance Measurement Dynamic Method Example Preset Setting Measurement CommandsTrigger Event Forced Trigger Calibration CommandsSample Points Sample RatePage Error Processing There are no errors in the queue Diagnostic Commands Changes become effective the next time the module powers up Examples Example 2 Setting Channel 2 to Acquire 200,000 SamplesExample 3 Setting Channel 2 to Pre-acquire 100,000 Samples Timeout Register = Timeout Base * 213 + Timeout Counter Timeout Counter = Timeout / Timeout Base ClockVXI Technology, Inc SVM2608 Programming Data Swapping Example Appendix aVXI Technology, Inc SVM2608 Appendix a Index