VXI SVM2608 user manual Example 3 Setting Channel 2 to Pre-acquire 100,000 Samples

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VXI Technology, Inc.

Write 0x0D40 @ Base address + 0xC00062

Method 2: Make one 32 bits write.

Write 0x00030D40 @ Base address + 0xC00060

Example 3: Setting Channel 2 to Pre-acquire 100,000 Samples

The acquisition of samples starts when a trigger point is met or when a trigger is forced by setting the corresponding Force bit. However, samples can be collected before the occurrence of the trigger point. These samples are called Pre-Trigger Points. The number of Pre-Trigger Points to be acquired is determined by the value programmed in the Pre-Trigger Points register of the respective channel.

In hexadecimal format, 100,000 corresponds to 0x186A0. The Pre-Trigger Points register for Channel 2 is composed of two 16-bit registers located at offsets 0xC00064 (the MS, bits D19 - D16) and 0xC00066 (the LS, bits D15 - D0).

Method 1: Make two 16 bits writes.

Write 0x0001 @ Base address + 0xC00064

Write 0x86A0 @ Base address + 0xC00066

 

Method 2: Make one 32 bits write.

 

Write 0x000186A0 @ Base address + 0xC00064

 

The total number of samples acquired is set by the Sample Points, and the number of samples

 

stored after the trigger event is:

 

(Sample Points) – (Pre-Trigger Points)

 

 

Note

Pre-Trigger Points must be less than Sample Points (Pre-Trigger Points < Sample Points).

Example 4: Setting Channel 2 to Delay Acquisition by 1,500,000 Samples

The acquisition of samples starts when a trigger point is met or when a trigger is forced by setting the corresponding Force bit. If the acquisition is to be triggered by a trigger event (signal trigger, external trigger or forced trigger) the first sample is collected either immediately, within one sample clock period from the moment when the trigger occurs or after a Delay Period. The Delay Period is determined by the value programmed in the Trigger Delay register of the respective channel. The Delay Period is based on the Sample Rate value. If the value in the Trigger Delay register is set to zero, the sampling starts immediately after the trigger event. If the Trigger Delay register is set to 100 (0x64), for example, then Sample Zero is taken 100 sample clocks after the trigger event.

In hexadecimal format, 1,500,000 corresponds to 0x16E360. The Trigger Delay register for Channel 2 is composed of two 16-bit registers, located at offsets 0xC00068 (the MS, bits D31 - D16) and 0xC0006A (the LS, bits D15 - D0).

Method 1: Make two 16 bits writes.

Write 0x0016 @ Base address + 0xC00068

Write 0xE360 @ Base address + 0xC0006A

Method 2: Make one 32 bits write.

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SVM2608 Programming

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Contents SVM2608 VXI Technology, Inc Table of Contents Self Test Command Warranty Limitation of WarrantyCertification Restricted Rights LegendEMC Steve Mauga, QA ManagerService should only be performed by qualified personnel Terms and SymbolsUse Proper Power Cord Use Proper Power SourceAvoid Electric Shock Ground the ProductOperating Conditions Improper UseVXI Technology World Headquarters VXI Technology Cleveland Instrument DivisionVXI Technology Lake Stevens Instrument Division Technical SupportVXI Technology, Inc SVM2608 Preface Introduction OverviewScale Acquiring Data TriggeringDelayed Trigger Linear ModePre-Trigger Fifo Mode CommandsCalibrations Test BusOption SVM2608 Block Diagram SVM2608 Environmental Specifications Physical DescriptionFront Panel Interface Wiring GND CH1I CH3IGND CH1I+ GND CH3I+ Exttrigin CH0I CH2ISVM2608 Specifications MtbfOption 1 SVM2608-01 VXI Technology, Inc SVM2608 Introduction Calculating System Power and Cooling Requirements Setting the Chassis Backplane JumpersSetting the Base Address Rotary Switch LocationsDivide Decimal ExampleMSB LSB Switch to C and the front switch to Module INSTALLATION/REMOVALDevice Memory Maps Function OffsetReserved Register OffsetSVM2608 A32 Register MAP MS = Most Significant LS = Least Significant0x72 Command Register Channel 0x74 Databyte Ordering Determining the Register Address Description of Registers Accessing the RegistersSysfailctl Force Trigger, Start Register 0x02 Read & Write INTLVL2HSTRIGSRC2 EXT Trig SlopeReserved TimeoutctlExternal Trigger Level 0x06 Read & Write 2WIREOHMS 4WIREOHMSLINEAR/FIFO ATTN-GAIN1-GAIN0Sample Rate 0x0E, 0x36, 0x5E, 0x86 Read & Write Sample Rate 0x0C, 0x34, 0x5C, 0x84 Read & WriteKHz Channels 0-3/5 MHz Channels 4-5 LPF Control This bit Sample Rate, High-Speed 0xAC, 0xD4 Read & Write Sample Rate, High-Speed 0xAE, 0xD6 Read & WriteTimeout 0x1C, 0x44, 0x6C, 0x94, 0xBC, 0xE4 Read & Write Fifo Data 0x26, 0x4E, 0x76, 0x9E, 0xC6, 0xEE Read Only Fifo Data 0x24, 0x4C, 0x74, 0x9C, 0xC4, 0xEC Read OnlyReserved Registers 0xF8 0xFC Trigger Delay = Microprocessor Commands Measurement CommandsCaptured Data Calculations Resistance Measurement Offset Method Self Test CommandResistance Measurement Dynamic Method Preset Setting Measurement Commands ExampleCalibration Commands Sample PointsSample Rate Trigger Event Forced TriggerPage Error Processing There are no errors in the queue Diagnostic Commands Changes become effective the next time the module powers up Example 2 Setting Channel 2 to Acquire 200,000 Samples ExamplesExample 3 Setting Channel 2 to Pre-acquire 100,000 Samples Timeout Counter = Timeout / Timeout Base Clock Timeout Register = Timeout Base * 213 + Timeout CounterVXI Technology, Inc SVM2608 Programming Appendix a Data Swapping ExampleVXI Technology, Inc SVM2608 Appendix a Index
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