VXI SVM2608 user manual Examples, Example 2 Setting Channel 2 to Acquire 200,000 Samples

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EXAMPLES

Example 1: Setting the Channel 2 and 4 Sample Rate to 123 ms (8.13 kHz)

The sample rate clock for an individual low-speed channel (Channels 0 – 3) is generated by dividing a 0.1 µs (10 MHz) reference clock, generated by an on-board oscillator, by the value present in the Sample Rate register of the respective channel. For the high-speed channels (Channels 4 – 5), the reference clock is 8.333 ns (120 MHz).

123 ms = 123*10-3s

For Channel 2, divide 123 ms by the 0.1 µs reference clock:

123⋅10-3s = 1,230,000

100⋅10−9 s

For Channel 4, divide 123 ms by the 8.333 ns reference clock:

123 ⋅ 10-3s

 

≅ 14,760,590

8.333 ⋅ 10−9

 

s

To set the Sample Rate to 123 ms, the reference clock must be divided by 1,230,000 for Channel 2 and 14,760,590 for Channel 4. In hexadecimal format, these values correspond to 0x12C4B0 and E13A8E, respectively. The Sample Rate register for Channel 2 is composed of two 16 bits registers located at offsets 0xC0005C (the MS – Most Significant bits, bits D24 - 16) and 0xC0005E (the LS – Least Significant bits, bits D15 - D0). The Sample Rate register for Channel 4 is similar, starting at offset 0xAC.

Method 1: Make two 16 bits writes.

For low-speed Channel 2:

Write 0x0012 to Base address + 0xC0005C

Write 0xC4B0 to Base address + 0xC0005E

For high-speed Channel 4:

Write 0x00E1 to Base address + 0xC000AC

Write 0x3A8E to Base address + 0xC000AE

Method 2: Make one 32 bits write.

For low-speed channels 0 – 3:

Write 0x0012C4B0 to Base address + 0xC0005C

For high-speed channels 4 – 5:

Write 0x00E13A8E to Base address + 0xC000AE

Example 2: Setting Channel 2 to Acquire 200,000 Samples

The number of samples acquired in Linear mode by a channel is determined by the value programmed in the Sample Points register of the respective channel. In hexadecimal format, 200,000 corresponds to 0x30D40. The Sample Points register for Channel 2 is composed of two 16-bit registers located at offsets 0xC00060 (the MS, bits D19 - D16) and 0xC00062 (the LS, bits D15 - D0).

Method 1: Make two 16 bits writes.

Write 0x0003 @ Base address + 0xC00060

SVM2608 Programming

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Contents SVM2608 VXI Technology, Inc Table of Contents Self Test Command Restricted Rights Legend WarrantyLimitation of Warranty CertificationSteve Mauga, QA Manager EMCUse Proper Power Source Service should only be performed by qualified personnelTerms and Symbols Use Proper Power CordImproper Use Avoid Electric ShockGround the Product Operating ConditionsTechnical Support VXI Technology World HeadquartersVXI Technology Cleveland Instrument Division VXI Technology Lake Stevens Instrument DivisionVXI Technology, Inc SVM2608 Preface Overview IntroductionScale Triggering Acquiring DataLinear Mode Delayed TriggerPre-Trigger Test Bus Fifo ModeCommands CalibrationsOption SVM2608 Block Diagram Physical Description SVM2608 Environmental SpecificationsCH1I+ GND CH3I+ Exttrigin CH0I CH2I Front Panel Interface WiringGND CH1I CH3I GNDMtbf SVM2608 SpecificationsOption 1 SVM2608-01 VXI Technology, Inc SVM2608 Introduction Setting the Chassis Backplane Jumpers Calculating System Power and Cooling RequirementsRotary Switch Locations Setting the Base AddressExample Divide DecimalMSB LSB Module INSTALLATION/REMOVAL Switch to C and the front switch toRegister Offset Device Memory MapsFunction Offset ReservedMS = Most Significant LS = Least Significant SVM2608 A32 Register MAP0x72 Command Register Channel 0x74 Databyte Ordering Determining the Register Address Accessing the Registers Description of RegistersSysfailctl EXT Trig Slope Force Trigger, Start Register 0x02 Read & WriteINTLVL2 HSTRIGSRC2Timeoutctl ReservedExternal Trigger Level 0x06 Read & Write ATTN-GAIN1-GAIN0 2WIREOHMS4WIREOHMS LINEAR/FIFOSample Rate 0x0C, 0x34, 0x5C, 0x84 Read & Write Sample Rate 0x0E, 0x36, 0x5E, 0x86 Read & WriteKHz Channels 0-3/5 MHz Channels 4-5 LPF Control This bit Sample Rate, High-Speed 0xAE, 0xD6 Read & Write Sample Rate, High-Speed 0xAC, 0xD4 Read & WriteTimeout 0x1C, 0x44, 0x6C, 0x94, 0xBC, 0xE4 Read & Write Fifo Data 0x24, 0x4C, 0x74, 0x9C, 0xC4, 0xEC Read Only Fifo Data 0x26, 0x4E, 0x76, 0x9E, 0xC6, 0xEE Read OnlyReserved Registers 0xF8 0xFC Trigger Delay = Measurement Commands Microprocessor CommandsCaptured Data Calculations Self Test Command Resistance Measurement Offset MethodResistance Measurement Dynamic Method Example Preset Setting Measurement CommandsTrigger Event Forced Trigger Calibration CommandsSample Points Sample RatePage Error Processing There are no errors in the queue Diagnostic Commands Changes become effective the next time the module powers up Examples Example 2 Setting Channel 2 to Acquire 200,000 SamplesExample 3 Setting Channel 2 to Pre-acquire 100,000 Samples Timeout Register = Timeout Base * 213 + Timeout Counter Timeout Counter = Timeout / Timeout Base ClockVXI Technology, Inc SVM2608 Programming Data Swapping Example Appendix aVXI Technology, Inc SVM2608 Appendix a Index