VXI SVM2608 user manual Linear Mode, Pre-Trigger, Delayed Trigger

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VXI Technology, Inc.

In absence of a Trigger signal, the acquisition can be forced by setting a control bit, the FORCE bit. Forcing an acquisition on a channel only starts acquisition on that channel. Each channel has its own corresponding FORCE bit.

Linear Mode

In Linear mode, the total number of samples collected (also referred to as Sample Points) is determined by the value programmed into the Sample Points register. The first sample (also referred to as Sample Zero) is stored in memory when a Trigger Event occurs. Sample Zero is from the value read from the channel’s base address at offset zero (0x000000 for Channel 0, 0x200000 for Channel 1, 0x400000 for Channel 2 and 0x600000 for Channel 3).

Pre-Trigger

In Linear mode, it is also possible to store samples that occur before a Trigger Event. When a channel is armed and the Pre-Trigger register is programmed with a value other than zero, that channel will begin sampling immediately, without waiting for an External Trigger. After it stores the number of samples specified in the Pre-Trigger register (also referred to as Pre-Trigger Points), it begins monitoring the Trigger Event. Until the Trigger Event occurs, the channel continues sampling and storing. When the Trigger Event occurs, Sample Zero is stored. After the Trigger Event, the number of data points collected is determined by the following equation:

AFTER TRIGGER POINTS = SAMPLE POINTS – PRETRIGGER POINTS

When the user reads from offset zero of a channel, the data returned is Sample Zero followed by Sample Zero + 1, etc. The Pre-Trigger Points can be read from the top of that channel’s memory. For example, if 0x100 Pre-Trigger Points were sampled on Channel 0 after the acquisition is completed, the samples can be retrieved from locations 0x1FFE00, 0x1FFE02 …0x1FFFFE with the data at 0x1FFFFE being the last Pre-Trigger Sample before the trigger event.

Delayed Trigger

In Linear mode, it is also possible to delay storing Sample Zero by a number of sample clocks, where a sample clock is defined by the Sample Clock Rate register. The number of sample clocks an acquisition is delayed (also referred to as Delayed Points) is programmed in the Delayed Trigger register. Samples are taken and stored immediately when the Trigger Event occurs, but Sample Zero will be stored only after the specified number of Delayed Points passes. Data stored during the Delayed period can be viewed by the user at the top of the memory space of the respective channel (same as in Pre-Trigger mode as above), assuming that the following condition is observed:

SAMPLE POINTS < 1 MSamples

As opposed to the Pre-Trigger acquisition, the number of samples taken after the Trigger Event is not affected by the number of samples taken before it:

AFTER TRIGGER POINTS = SAMPLE POINTS

If the following condition is met:

DELAYED POINTS < 1 M – SAMPLE POINTS

Then all the samples collected before the Trigger Event are available to the user.

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SVM2608 Introduction

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Contents SVM2608 VXI Technology, Inc Table of Contents Self Test Command Certification WarrantyLimitation of Warranty Restricted Rights LegendEMC Steve Mauga, QA ManagerUse Proper Power Cord Service should only be performed by qualified personnelTerms and Symbols Use Proper Power SourceOperating Conditions Avoid Electric ShockGround the Product Improper UseVXI Technology Lake Stevens Instrument Division VXI Technology World HeadquartersVXI Technology Cleveland Instrument Division Technical SupportVXI Technology, Inc SVM2608 Preface Introduction OverviewScale Acquiring Data TriggeringPre-Trigger Linear ModeDelayed Trigger Calibrations Fifo ModeCommands Test BusOption SVM2608 Block Diagram SVM2608 Environmental Specifications Physical DescriptionGND Front Panel Interface WiringGND CH1I CH3I CH1I+ GND CH3I+ Exttrigin CH0I CH2ISVM2608 Specifications MtbfOption 1 SVM2608-01 VXI Technology, Inc SVM2608 Introduction Calculating System Power and Cooling Requirements Setting the Chassis Backplane JumpersSetting the Base Address Rotary Switch LocationsMSB LSB ExampleDivide Decimal Switch to C and the front switch to Module INSTALLATION/REMOVALReserved Device Memory MapsFunction Offset Register OffsetSVM2608 A32 Register MAP MS = Most Significant LS = Least Significant0x72 Command Register Channel 0x74 Databyte Ordering Determining the Register Address Sysfailctl Accessing the RegistersDescription of Registers HSTRIGSRC2 Force Trigger, Start Register 0x02 Read & WriteINTLVL2 EXT Trig SlopeExternal Trigger Level 0x06 Read & Write TimeoutctlReserved LINEAR/FIFO 2WIREOHMS4WIREOHMS ATTN-GAIN1-GAIN0KHz Channels 0-3/5 MHz Channels 4-5 LPF Control This bit Sample Rate 0x0C, 0x34, 0x5C, 0x84 Read & WriteSample Rate 0x0E, 0x36, 0x5E, 0x86 Read & Write Sample Rate, High-Speed 0xAC, 0xD4 Read & Write Sample Rate, High-Speed 0xAE, 0xD6 Read & WriteTimeout 0x1C, 0x44, 0x6C, 0x94, 0xBC, 0xE4 Read & Write Reserved Registers 0xF8 0xFC Fifo Data 0x24, 0x4C, 0x74, 0x9C, 0xC4, 0xEC Read OnlyFifo Data 0x26, 0x4E, 0x76, 0x9E, 0xC6, 0xEE Read Only Trigger Delay = Microprocessor Commands Measurement CommandsCaptured Data Calculations Resistance Measurement Dynamic Method Self Test CommandResistance Measurement Offset Method Preset Setting Measurement Commands ExampleSample Rate Calibration CommandsSample Points Trigger Event Forced TriggerPage Error Processing There are no errors in the queue Diagnostic Commands Changes become effective the next time the module powers up Example 2 Setting Channel 2 to Acquire 200,000 Samples ExamplesExample 3 Setting Channel 2 to Pre-acquire 100,000 Samples Timeout Counter = Timeout / Timeout Base Clock Timeout Register = Timeout Base * 213 + Timeout CounterVXI Technology, Inc SVM2608 Programming Appendix a Data Swapping ExampleVXI Technology, Inc SVM2608 Appendix a Index
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