VXI user manual SVM2608 A32 Register MAP, MS = Most Significant LS = Least Significant

Page 28

VXI Technology, Inc.

TABLE 3-1: SVM2608 A32 REGISTER MAP

Note

MS = Most Significant

LS = Least Significant

OFFSET

WRITE FUNCTION

READ FUNCTION

0x00

Sysfail Control, Interrupt Levels

Sysfail Control, Interrupt Levels

0x02

Force Trigger/Start

Force Trigger/Start

0x04

Reserved

Reserved

0x06

External Trigger Level

External Trigger Level

0x08

Control (Channel 0)

Control (Channel 0)

0x0A

Trigger Level (Channel 0)

Trigger Level (Channel 0)

0x0C

Sample Rate (Channel 0) – (MS)

Sample Rate (Channel 0) – (MS)

0x0E

Sample Rate (Channel 0) – (LS)

Sample Rate (Channel 0) – (LS)

0x10

Sample Points (Channel 0) – (MS)

Sample Points (Channel 0) – (MS)

0x12

Sample Points (Channel 0) – (LS)

Sample Points (Channel 0) – (LS)

0x14

Pre-Trigger Points (Channel 0) – (MS)

Pre-Trigger Points (Channel 0) – (MS)

0x16

Pre-Trigger Points (Channel 0) – (LS)

Pre-Trigger Points (Channel 0) – (LS)

0x18

Trigger Delay (Channel 0) – (MS)

Trigger Delay (Channel 0) – (MS)

0x1A

Trigger Delay (Channel 0) – (LS)

Trigger Delay (Channel 0) – (LS)

0x1C

Timeout (Channel 0)

Timeout (Channel 0)

0x1E

Interrupt Enable (Channel 0)

Interrupt Enable (Channel 0)

0x20

Reserved

Interrupt Status (Channel 0)

0x22

Command Register (Channel 0)

Command Register (Channel 0)

0x24

Reserved

FIFO Data (Channel 0) – (MS)

0x26

Reserved

FIFO Data (Channel 0) – (LS)

0x28

Reserved

Result Register (Channel 0) – (MS)

0x2A

Reserved

Result Register (Channel 0) – (LS)

0x2C

Reserved

Result Register (Channel 0) – (MS)

0x2E

Reserved

Result Register (Channel 0) – (LS)

0x30

Control (Channel 1)

Control (Channel 1)

0x32

Trigger Level (Channel 1)

Trigger Level (Channel 1)

0x34

Sample Rate (Channel 1) – (MS)

Sample Rate (Channel 1) – (MS)

0x36

Sample Rate (Channel 1) – (LS)

Sample Rate (Channel 1) – (LS)

0x38

Sample Points (Channel 1) – (MS)

Sample Points (Channel 1) – (MS)

0x3A

Sample Points (Channel 1) – (LS)

Sample Points (Channel 1) – (LS)

0x3C

Pre-Trigger Points (Channel 1) – (MS)

Pre-Trigger Points (Channel 1) – (MS)

0x3E

Pre-Trigger Points (Channel 1) – (LS)

Pre-Trigger Points (Channel 1) – (LS)

0x40

Trigger Delay (Channel 1) – (MS)

Trigger Delay (Channel 1) – (MS)

0x42

Trigger Delay (Channel 1) – (LS)

Trigger Delay (Channel 1) – (LS)

0x44

Timeout (Channel 1)

Timeout (Channel 1)

0x46

Interrupt Enable (Channel 1)

Interrupt Enable (Channel 1)

0x48

Reserved

Interrupt Status (Channel 1)

0x4A

Command Register (Channel 1)

Command Register (Channel 1)

0x4C

Reserved

FIFO Data (Channel 1) – (MS)

0x4E

Reserved

FIFO Data (Channel 1) – (LS)

0x50

Reserved

Result Register (Channel 1) – (MS)

0x52

Reserved

Result Register (Channel 1) – (LS)

0x54

Reserved

Result Register (Channel 1) – (MS)

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SVM2608 Programming

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Contents SVM2608 VXI Technology, Inc Table of Contents Self Test Command Warranty Limitation of WarrantyCertification Restricted Rights LegendEMC Steve Mauga, QA ManagerService should only be performed by qualified personnel Terms and SymbolsUse Proper Power Cord Use Proper Power SourceAvoid Electric Shock Ground the ProductOperating Conditions Improper UseVXI Technology World Headquarters VXI Technology Cleveland Instrument DivisionVXI Technology Lake Stevens Instrument Division Technical SupportVXI Technology, Inc SVM2608 Preface Introduction OverviewScale Acquiring Data TriggeringDelayed Trigger Linear ModePre-Trigger Fifo Mode CommandsCalibrations Test BusOption SVM2608 Block Diagram SVM2608 Environmental Specifications Physical DescriptionFront Panel Interface Wiring GND CH1I CH3IGND CH1I+ GND CH3I+ Exttrigin CH0I CH2ISVM2608 Specifications MtbfOption 1 SVM2608-01 VXI Technology, Inc SVM2608 Introduction Calculating System Power and Cooling Requirements Setting the Chassis Backplane JumpersSetting the Base Address Rotary Switch LocationsDivide Decimal ExampleMSB LSB Switch to C and the front switch to Module INSTALLATION/REMOVALDevice Memory Maps Function OffsetReserved Register OffsetSVM2608 A32 Register MAP MS = Most Significant LS = Least Significant0x72 Command Register Channel 0x74 Databyte Ordering Determining the Register Address Description of Registers Accessing the RegistersSysfailctl Force Trigger, Start Register 0x02 Read & Write INTLVL2HSTRIGSRC2 EXT Trig SlopeReserved TimeoutctlExternal Trigger Level 0x06 Read & Write 2WIREOHMS 4WIREOHMSLINEAR/FIFO ATTN-GAIN1-GAIN0Sample Rate 0x0E, 0x36, 0x5E, 0x86 Read & Write Sample Rate 0x0C, 0x34, 0x5C, 0x84 Read & WriteKHz Channels 0-3/5 MHz Channels 4-5 LPF Control This bit Sample Rate, High-Speed 0xAC, 0xD4 Read & Write Sample Rate, High-Speed 0xAE, 0xD6 Read & WriteTimeout 0x1C, 0x44, 0x6C, 0x94, 0xBC, 0xE4 Read & Write Fifo Data 0x26, 0x4E, 0x76, 0x9E, 0xC6, 0xEE Read Only Fifo Data 0x24, 0x4C, 0x74, 0x9C, 0xC4, 0xEC Read OnlyReserved Registers 0xF8 0xFC Trigger Delay = Microprocessor Commands Measurement CommandsCaptured Data Calculations Resistance Measurement Offset Method Self Test CommandResistance Measurement Dynamic Method Preset Setting Measurement Commands ExampleCalibration Commands Sample PointsSample Rate Trigger Event Forced TriggerPage Error Processing There are no errors in the queue Diagnostic Commands Changes become effective the next time the module powers up Example 2 Setting Channel 2 to Acquire 200,000 Samples ExamplesExample 3 Setting Channel 2 to Pre-acquire 100,000 Samples Timeout Counter = Timeout / Timeout Base Clock Timeout Register = Timeout Base * 213 + Timeout CounterVXI Technology, Inc SVM2608 Programming Appendix a Data Swapping ExampleVXI Technology, Inc SVM2608 Appendix a Index
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