Toshiba TW40F80 manual Operation of Channel Selection Circuit

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SECTION III: CHANNEL SELECTION CIRCUIT

1. OUTLINE OF CHANNEL SELECTION CIRCUIT SYSTEM

The channel selection circuit in the N5SS chassis employs a bus system which performs a central control by connect- ing a channel selection microcomputer to a control IC in each circuit block through control lines called a bus. In the bus system which controls each IC, the I2C bus system (two line bus system) developed by Philips Co. Ltd. in the Neth- erlands has been employed.

The ICs controlled by the I2C bus system are: IC for V/C/D signal processing (Q501), IC for A/V switching (QV01), IC for non volatile memory (QA02), Main and sub U/V tuners (H001, HY01), IC for deflection distortion correction (Q302), IC for

POP and Double Window signal processing (QY03), IC for closed caption control (QM01), IC for WAC control (QX01), IC for 3D-YCS (QZ01), IC for AUTOLIVE (QK06).

Differences from N5SS chassis are as follows;

1.On-screen function inside microcomputer is used. Sepa- rate IC is not used for on-screen.

2.The microcomputer does not have the closed caption function, but controls separate IC for closed caption.

3.The system uses two channels of I2C bus. One is only for non-volatile memory.

2. OPERATION OF CHANNEL SELECTION CIRCUIT

Toshiba made 8 bit microcomputer TLCS-870 series for TV receiver, TMP87CS38N-3320 is employed for QA01.

With this microcomputer, each IC and circuit shown below are controlled.

(1)CONTROL OF VIDEO/CHROMA/DEF SIGNAL PROCESS IC (Q501 Toshiba TA1222AN)

•Adjustments for uni-color, brightness, tint, color gain, sharpness and PIP uni-color

•Setting of adjustment memory values for sub- brightness, sub-color and sub-tint, etc.

•Setting of memory values for video parameters such as white balance (RGB cutoff, GB drive) and gcorrection, etc.

•Setting of video parameters of video modes (Stan- dard, Movie, Memory)

(2)CONTROL OF A/V SWITCH IC (QV01 Toshiba TA1218N)

•Performs source switching for main screen and sub screen

•Performs source switching for TV and three video inputs

(3)CONTROL OF NON-VOLATILE MEMORY IC (QA02 Microchip 24LC08BI/P)

•Memorizes data for video and audio signal adjust- ment values, volume and woofer adjustment val- ues, external input status, etc.

•Memorizes adjustment data for white balance (RGB cutoff, GB drive), sub-brightness, sub color, sub tint, etc.

•Memorizes deflection distortion correction value data adjusted for each unit.

(4)CONTROL OF U/V TUNER UNIT (H001 Toshiba ELA12L, HY01 Toshiba EL922L)

•A desired channel can be tuned by transferring a channel selection frequency data (divided ratio data) to the I2C bus type frequency synthesizer equipped in the tuner, and by setting a band switch data which selects the UHF or VHF band.

(5)CONTROL OF DEFLECTION DISTORTION COR- RECTION IC (Q302 Toshiba TA8859P)

•Sets adjustment memory value for vertical ampli- tude, linearity, horizontal amplitude, parabola, cor- ner, trapezoid distortion.

(6)CONTROL OF POP & Double Window SIGNAL PRO- CESS IC (QY03 Toshiba TC9092AF, QY91 Sony CXP85116B-514Q)

•Controls ON/OFF and 9 pictures serch of POP.

(7)CONTROL OF CLOSED CAPTION/EDS (QM01 Motorola XC144144P)

•Controls Closed Caption/EDS.

(8)CONTROL OF WAC (QX01 Toshiba TC9097F)

•Controls Wide Aspect.

(9)CONTROL OF 3D-YCS (QZ01 Toshiba TC9086F)

•Controls ON/OFF of 3 Dimension Y/C separator.

(10)CONTROL OF VERTICAL AMPLITUDE (QK06 Toshiba TMP87CM36N)

•Controls Wide Mode.

(11)CONTROL OF OSD (Do not I2C BUS) (QR60 Fujitsu MB90091)

•Controls of OSD Menu.

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Contents TW40F80 Contents Wide Aspect Conversion Circuit Failure Analysis Terminal FUNCTION, Description and Block DiagramSection XI Digital Convergence Circuit Section X Deflection Distortion Correction CircuitImproved Serviceability Section FeatureOutline Merits of BUS System Reduction of Parts CountChassis Model SpecificationsVideo 3 Inputs Front ViewIN-VIDEO Rear View100 Remote Control ViewStarsight Newosd FRO. Surr Chassis LayoutConstruction of Chassis Section II TUNER, IF/MTS/S. PRO Module Circuit Block Major FeaturesOutline RF AGCAudio Multiplex Demodulation Circuit A.PRO Section Audio Processor A.PRO block diagramConfiguration of the audio circuit and signal flow are given Terminal No Name POP TunerOperation of Channel Selection Circuit SDA SCL MicrocomputerMicrocomputer Terminal Function Terminal Name Function In/Out Logic Remarks Microcomputer Terminal Name and Operation LogicSDA On Screen FunctionEEPROMQA02 System Block Diagram Local key assignment Function Local KEY Detection MethodTo TV set Remote Control Code AssignmentCode Function Custom codes are 40-BFH TV set for North U.S.A Code Function OPT0 OPT1 Models HEX Optional Setting for Each ModelService Adjustment Entering to Service ModeTest Signal Selection Executing Self Diagnosis Function Failure Diagnosis ProcedureContents to be Confirmed by Customer Self Check Understanding Self Diagnosis IndicationClearing method of self diagnosis result YES Troubleshooting ChartTV does Not Turned on No Picture Snow Noise No Acception of KEY-INNo Indication On Screen Memory Circuit CheckSection IV DVD Switch Circuit DVD Switch Block Diagram Outline Section V WAC Circuit Outline ConfigurationCircuit Operation OperationWide aspect conversion unit block diagram PB6348 Pin function of TC9097F QFP 80 pin Pin FunctionName Function Names and functions of TC9097FVFL2 TC9097F system block diagram Block DiagramE2PROM OK? Wide Aspect Conversion Circuit Failure Analysis ProceduresRaster Horizontal One Adjustment MethodScreen multi-search process Section VI Dual Circuit OutlinePrinciples of Operation System Component Diagram of Dual Unit Video/Color/Deflection Process Section OSD Sub screen process section Sub Screen Process SectionMain/Sub screen superimposing section Main/Sub Screen Superimposing SectionDiagram Main IC Terminal FUNCTION, Description and Block DiagramQY01 MPC1832GTQY01 mPC1832GT pin layout QY03 TC9092AF internal block diagram QY03 TC9092AF pin layout CKW QY03 TC9092AF pin list No Pin name Pin functionMRD1 QY10/QY11 M518221-30ZS internal block diagram Circuit Description Section VII 3-DIMENSION Y/C Separator Circuit OutlineConfiguration Circuit Description Terminal description PZ01 Theory of Operation Section Viii Vertical Output Circuit OutlineActual Circuit Output CircuitSawtooth Waveform Generation Circuit OperationOutput Output stage power supply voltage Protection Circuit for V Deflection Stop Linearity Characteristic CorrectionCharacter Correction Up-and Down-ward Extension Correction Up-and Down-ward Linearity BalanceTheory of Operation +35V Over Current Protection CircuitUZ22BSD UZ11BSBKetsu Raster Position Switching CircuitSection IX Horizontal Deflection Circuit Outline SignalHorizontal Drive Circuit Basic Operation of Horizontal DriveOn period OFF period Horizontal Output Circuit Signal DEF/POWER PCBOperation of Basic Circuit FBTT2~t3 Description of the basic circuit T1~t2T3~t4 T4~t6Curve Correction S Capacitor Amplitude CorrectionLinearity Correction LIN Linearity coil Left-right Asymmetrical Correction LIN coilOutline White Peak Bending Correction CircuitOperation Theory EHTBlanking Gate Protector Low Voltage ProtectionAFC High Voltage Generation CircuitABL High Voltage DPC Circuit RegulatorHigh Voltage 1. +210V2. +35V Anode High Voltage CircuitCR-BLOCK ED’ ActualFBT CR-BLOCK E H 23 X-RAY protection circuit RAY Protection CircuitOver Current Protection Circuit Block Diagram Functions and FeaturesOUT Diode Modulator CircuitActual Circuit First Half Scanning Period Basic Operation and Current PathLater Half Scanning Period P.T Later Half of Flyback PeriodFirst Half of Scanning Period Section XI Digital Convergence Circuit Outline Memory ResetProm PLLPicture Adjustment Entering/Exiting Mode Service ModeSfull Initial screenFirst screen Second screen ENT Key function of remote control unitNormal/Full Operation procedureEach Screen Adjustment Method Theater Wide1 Theater Wide 269.5 Case Study When CRT is ReplacedWhen Convergence Unit is Replaced Adjusting Procedure in Replacing Convergence Unit/Main Def TroubleshootingAdjusting Procedure in Replacing CRT Convergence Output Circuit Convergence Block Diagram Convergence Troubleshooting Chart Main Unit
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