Toshiba TW40F80 manual QY03 TC9092AF internal block diagram

Page 52

 

 

 

 

 

 

 

 

LC

 

H,V(Main)

Ys

Y

R-Y

 

B-Y

 

 

YCDELAY

ADJUSTMENT

INTERPORATIONFILTER BETWEENY/C

(DAJA)

 

CLOCKGENERATION (MAIN)

 

FRAMESIGNAL

GENERATION (WAKU)

 

DA

 

 

 

VERTICALFOLDED

ELIMINATION

MEMORY(1H (12BIT)) (V)

 

 

FRAME

SIGNAL

MULTIPLEX

SW

 

 

HORIZONTAL

FOLDSIGNAL

ELIMINATING

FILTER(HFA)

 

MEMORYCU

BIT)(CONTROLUNIT)

 

TELTEXTDETECTION(J) 1HMEMORY(11BIT)

DELAYADJUSTMENT(DAJB)

 

 

SUBSAMPLEFILLINGPIT(C)

FILTERFACTOROPERATION/

GENERATION(KGEN)

HORIZONTAL INTERPORATION FILTER(HFB)

 

PROGRAMDATA

(16kBIT+3k

 

 

 

DATA

REARRANGE

MENT

(R)

 

 

AD

 

 

AD

 

 

 

 

 

 

 

PICTURE

MEMORY

(2MBIT)

 

 

 

 

CLOCK GENERATION

 

 

 

INTERFACE

 

 

REARRANGE

 

 

 

 

 

MPX

(SUB)

 

2IC

 

DATA

MENT

(W)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLAMP

 

 

 

 

 

 

 

 

 

 

 

Subscreen videoinput

Y

 

R-Y

B-Y

LC

 

(Sub)

2IC

 

 

 

 

 

 

 

 

 

 

 

 

H,V

 

 

 

 

 

 

 

 

 

Fig. 6-7 QY03 TC9092AF internal block diagram

 

 

 

 

 

 

 

 

 

 

52

 

 

 

 

 

 

 

 

Image 52
Contents TW40F80 Contents Terminal FUNCTION, Description and Block Diagram Wide Aspect Conversion Circuit Failure AnalysisSection X Deflection Distortion Correction Circuit Section XI Digital Convergence CircuitSection Feature Improved ServiceabilityOutline Merits of BUS System Reduction of Parts CountSpecifications Chassis ModelFront View Video 3 InputsRear View IN-VIDEORemote Control View 100Chassis Layout Starsight Newosd FRO. SurrConstruction of Chassis Major Features Section II TUNER, IF/MTS/S. PRO Module Circuit BlockOutline RF AGCAudio Multiplex Demodulation Circuit A.PRO block diagram A.PRO Section Audio ProcessorConfiguration of the audio circuit and signal flow are given POP Tuner Terminal No NameOperation of Channel Selection Circuit Microcomputer SDA SCLMicrocomputer Terminal Function Microcomputer Terminal Name and Operation Logic Terminal Name Function In/Out Logic RemarksEEPROMQA02 On Screen FunctionSDA System Block Diagram Local KEY Detection Method Local key assignment FunctionCode Function Remote Control Code AssignmentTo TV set Custom codes are 40-BFH TV set for North U.S.A Code Function Optional Setting for Each Model OPT0 OPT1 Models HEXTest Signal Selection Entering to Service ModeService Adjustment Contents to be Confirmed by Customer Failure Diagnosis ProcedureExecuting Self Diagnosis Function Understanding Self Diagnosis Indication Self CheckClearing method of self diagnosis result TV does Not Turned on Troubleshooting ChartYES No Acception of KEY-IN No Picture Snow NoiseMemory Circuit Check No Indication On ScreenSection IV DVD Switch Circuit DVD Switch Block Diagram Outline Configuration Section V WAC Circuit OutlineCircuit Operation OperationWide aspect conversion unit block diagram PB6348 Pin Function Pin function of TC9097F QFP 80 pinNames and functions of TC9097F Name FunctionVFL2 Block Diagram TC9097F system block diagramWide Aspect Conversion Circuit Failure Analysis Procedures E2PROM OK?Adjustment Method Raster Horizontal OnePrinciples of Operation Section VI Dual Circuit OutlineScreen multi-search process System Component Diagram of Dual Unit Video/Color/Deflection Process Section OSD Sub Screen Process Section Sub screen process sectionMain/Sub Screen Superimposing Section Main/Sub screen superimposing sectionMain IC Terminal FUNCTION, Description and Block Diagram DiagramQY01 MPC1832GTQY01 mPC1832GT pin layout QY03 TC9092AF internal block diagram QY03 TC9092AF pin layout QY03 TC9092AF pin list No Pin name Pin function CKWMRD1 QY10/QY11 M518221-30ZS internal block diagram Configuration Circuit Description Section VII 3-DIMENSION Y/C Separator Circuit OutlineCircuit Description Terminal description PZ01 Section Viii Vertical Output Circuit Outline Theory of OperationOutput Circuit Actual CircuitSawtooth Waveform Generation Circuit OperationOutput Output stage power supply voltage Linearity Characteristic Correction Protection Circuit for V Deflection StopCharacter Correction Up-and Down-ward Extension Correction Up-and Down-ward Linearity Balance+35V Over Current Protection Circuit Theory of OperationUZ22BSD UZ11BSBRaster Position Switching Circuit KetsuSignal Section IX Horizontal Deflection Circuit OutlineHorizontal Drive Circuit Basic Operation of Horizontal DriveOn period OFF period Signal DEF/POWER PCB Horizontal Output CircuitOperation of Basic Circuit FBTDescription of the basic circuit T1~t2 T2~t3T3~t4 T4~t6Linearity Correction LIN Amplitude CorrectionCurve Correction S Capacitor Left-right Asymmetrical Correction LIN coil Linearity coilWhite Peak Bending Correction Circuit OutlineOperation Theory EHTBlanking Low Voltage Protection Gate ProtectorHigh Voltage Generation Circuit AFCABL High Voltage DPC Circuit Regulator2. +35V 1. +210VHigh Voltage CR-BLOCK High Voltage CircuitAnode FBT CR-BLOCK E H ActualED’ RAY Protection Circuit 23 X-RAY protection circuitOver Current Protection Circuit Functions and Features Block DiagramDiode Modulator Circuit OUTActual Circuit Later Half Scanning Period Basic Operation and Current PathFirst Half Scanning Period First Half of Scanning Period Later Half of Flyback PeriodP.T Section XI Digital Convergence Circuit Outline Reset MemoryProm PLLPicture Adjustment Service Mode Entering/Exiting ModeFirst screen Second screen Initial screenSfull Key function of remote control unit ENTEach Screen Adjustment Method Operation procedureNormal/Full Theater Wide1 Theater Wide 269.5 When Convergence Unit is Replaced When CRT is ReplacedCase Study Adjusting Procedure in Replacing CRT TroubleshootingAdjusting Procedure in Replacing Convergence Unit/Main Def Convergence Output Circuit Convergence Block Diagram Convergence Troubleshooting Chart Main Unit