Toshiba TW40F80 manual Circuit Operation, Video/Color/Deflection Process Section

Page 46

4. CIRCUIT OPERATION

4-1. Video/Color/Deflection Process Section

The video/color/deflection section is shown in Fig. 6-2.

The luminance signal is supplied from pin Y08 of PY01 and its frequency bandwidth is limited by the low pass filter (LPF) and then input to pin 36 of V/C/D IC (VIDEO IN). The Y signal output from pin 12 of PY01 superimposes the charac- ter signal on the video signal by QY49 and QY44, and then output to the sub screen process section.

QY49 and QY44 work as the analog switches. When the screen is displayed in DW, the switch operation is not car- ried out and the same signal as the input signal is output, and when the 9-screen multi-search process is carried out, the switch operation is carried out.

The OSD signal superimposes the shade of character signal by QY49 and the character signal by QY44 on Y signal.

On the other hand, the color signal is supplied from pin Y15 of PY01, limited its frequency bandwidth by the band pass filter (BPF) and then input to pin 34 of QY01 (COLOR IN). The color difference signals of the demodulated signal (R –

Y)and ( B – Y) are output from pins 13 and 14 of QY01. In the same way as the Y signal, the (R – Y) and (B – Y) signals are superimposed on the character signal with OSD signal by QY44.

The GBR matrix circuit which converts the Y, R – Y and B – Y signals into three primary color signal of G, B and R is used to convert the (R – Y) and (B – Y) signals into I and Q signals.

In the GBR matrix circuit, each G, B and R output is output as G – Y, B – Y and R signals when the Y signal is not input. Then the B – Y signal is converted to Q signal, R – Y to I signal pseudically by turning the phase by an angle of 33°.

Thus, R – Y and B – Y signals are input to pins 18 and 19 of QY01, and the output signals from pins 23 and 24 are devel- oped as the I and Q converted signals pseudically. The am- plitude of the signals is amplified by 6 dB amplifier of QY23 and the signals are output to the sub screen process section.

Since the sync signal is added to the luminance signal, the signal is input to pin 39 of QY01 (SYNC SEP IN) and the sync signals of HD and VD are output to pins 10 and 11 of QY01. The HD signal is waveshaped by QY42.

The HD signal (WHD1, WHD2) is used as the horizontal pulse for sub screen write and the VD signal (WVD) is as the vertical pulse for sub screen write in the sub screen process section.

In the sub screen microcomputer section, various kinds of control signals (brightness, density, hue, etc.) are output from the sub screen control microprocessor QY91 and the signals are used for the level matching adjustment. So the setting for the sub screen cannot be made by the user. Furthermore, the OSD signal for OSD superimposing is output.

The sub screen process IC control program is stored in the nonvolatile memory of the sub screen control microproces- sor QY91 in order to control the sub screen process IC (TC9092AF), and the data is sent via I2C bus.

46

Page 45 Page 47
Image 46
Page 45 Page 47
Contents TW40F80 Contents Terminal FUNCTION, Description and Block Diagram Wide Aspect Conversion Circuit Failure AnalysisSection X Deflection Distortion Correction Circuit Section XI Digital Convergence CircuitOutline Merits of BUS System Section FeatureImproved Serviceability Reduction of Parts CountSpecifications Chassis ModelFront View Video 3 InputsRear View IN-VIDEORemote Control View 100Chassis Layout Starsight Newosd FRO. SurrConstruction of Chassis Outline Major FeaturesSection II TUNER, IF/MTS/S. PRO Module Circuit Block RF AGCAudio Multiplex Demodulation Circuit A.PRO block diagram A.PRO Section Audio ProcessorConfiguration of the audio circuit and signal flow are given POP Tuner Terminal No NameOperation of Channel Selection Circuit Microcomputer SDA SCLMicrocomputer Terminal Function Microcomputer Terminal Name and Operation Logic Terminal Name Function In/Out Logic RemarksEEPROMQA02 On Screen FunctionSDA System Block Diagram Local KEY Detection Method Local key assignment FunctionCode Function Remote Control Code AssignmentTo TV set Custom codes are 40-BFH TV set for North U.S.A Code Function Optional Setting for Each Model OPT0 OPT1 Models HEXTest Signal Selection Entering to Service ModeService Adjustment Contents to be Confirmed by Customer Failure Diagnosis ProcedureExecuting Self Diagnosis Function Understanding Self Diagnosis Indication Self CheckClearing method of self diagnosis result TV does Not Turned on Troubleshooting ChartYES No Acception of KEY-IN No Picture Snow NoiseMemory Circuit Check No Indication On ScreenSection IV DVD Switch Circuit DVD Switch Block Diagram Outline Circuit Operation ConfigurationSection V WAC Circuit Outline OperationWide aspect conversion unit block diagram PB6348 Pin Function Pin function of TC9097F QFP 80 pinNames and functions of TC9097F Name FunctionVFL2 Block Diagram TC9097F system block diagramWide Aspect Conversion Circuit Failure Analysis Procedures E2PROM OK?Adjustment Method Raster Horizontal OnePrinciples of Operation Section VI Dual Circuit OutlineScreen multi-search process System Component Diagram of Dual Unit Video/Color/Deflection Process Section OSD Sub Screen Process Section Sub screen process sectionMain/Sub Screen Superimposing Section Main/Sub screen superimposing sectionQY01 Main IC Terminal FUNCTION, Description and Block DiagramDiagram MPC1832GTQY01 mPC1832GT pin layout QY03 TC9092AF internal block diagram QY03 TC9092AF pin layout QY03 TC9092AF pin list No Pin name Pin function CKWMRD1 QY10/QY11 M518221-30ZS internal block diagram Configuration Circuit Description Section VII 3-DIMENSION Y/C Separator Circuit OutlineCircuit Description Terminal description PZ01 Section Viii Vertical Output Circuit Outline Theory of OperationSawtooth Waveform Generation Output CircuitActual Circuit Circuit OperationOutput Output stage power supply voltage Character Correction Up-and Down-ward Extension Correction Linearity Characteristic CorrectionProtection Circuit for V Deflection Stop Up-and Down-ward Linearity BalanceUZ22BSD +35V Over Current Protection CircuitTheory of Operation UZ11BSBRaster Position Switching Circuit KetsuHorizontal Drive Circuit SignalSection IX Horizontal Deflection Circuit Outline Basic Operation of Horizontal DriveOn period OFF period Operation of Basic Circuit Signal DEF/POWER PCBHorizontal Output Circuit FBTT3~t4 Description of the basic circuit T1~t2T2~t3 T4~t6Linearity Correction LIN Amplitude CorrectionCurve Correction S Capacitor Left-right Asymmetrical Correction LIN coil Linearity coilOperation Theory White Peak Bending Correction CircuitOutline EHTBlanking Low Voltage Protection Gate ProtectorABL High Voltage Generation CircuitAFC High Voltage DPC Circuit Regulator2. +35V 1. +210VHigh Voltage CR-BLOCK High Voltage CircuitAnode FBT CR-BLOCK E H ActualED’ RAY Protection Circuit 23 X-RAY protection circuitOver Current Protection Circuit Functions and Features Block DiagramDiode Modulator Circuit OUTActual Circuit Later Half Scanning Period Basic Operation and Current PathFirst Half Scanning Period First Half of Scanning Period Later Half of Flyback PeriodP.T Section XI Digital Convergence Circuit Outline Prom ResetMemory PLLPicture Adjustment Service Mode Entering/Exiting ModeFirst screen Second screen Initial screenSfull Key function of remote control unit ENTEach Screen Adjustment Method Operation procedureNormal/Full Theater Wide1 Theater Wide 269.5 When Convergence Unit is Replaced When CRT is ReplacedCase Study Adjusting Procedure in Replacing CRT TroubleshootingAdjusting Procedure in Replacing Convergence Unit/Main Def Convergence Output Circuit Convergence Block Diagram Convergence Troubleshooting Chart Main Unit
Top Page Image Contents