Toshiba TW40F80 manual Microcomputer Terminal Name and Operation Logic

Page 20

<< MICROCOMPUTER TERMINAL NAME AND OPERATION LOGIC >>

 

 

No.

Terminal Name

Function

In/Out

Logic

Remarks

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

GND

 

 

 

0V

 

 

 

 

 

 

 

 

2

BAL

INPUT BALANCE

Out

PWM out

 

 

 

 

 

 

 

 

 

3

REM OUT

REMOTE CONTROL

Out

Remote control output

 

 

 

 

SIGNAL OUT

 

 

 

 

 

 

 

 

 

 

 

4

MUTE

SOUND MUTE OUT

Out

Sound mute output

 

 

 

 

 

 

 

 

 

5

SP MUTE

SPEAKER MUTE

Out

In muting = H

 

 

 

 

 

 

 

 

 

6

DEF POW

 

Out

 

 

 

 

 

 

 

 

 

 

7

POWER

POWER ON/OFF OUT

Out

Power control In ON = H

 

 

 

 

 

 

 

 

 

8

LED

POWER LED OUTPUT

Out

Power LED on-control

 

 

 

 

 

 

LED lighting = L

 

 

 

 

 

 

 

 

 

9

SS RST

STARSIGHT RESET

Out

Reset = L

0V

 

 

 

 

 

 

 

 

10

DVD CONT

DVD CONTROL

Out

DVD = L, Other = H

0V

 

 

 

 

 

 

 

 

11

SCL0

IIC BUS CLOCK OUT

Out

IIC bus clock output 0

 

 

 

 

 

 

 

 

 

12

SDA0

IIC BUS DATA IN/OUT

In/Out

IIC bus data input/output 0

 

 

13

SYNC VCD

H SYNC INPUT

In

Main picture H. sync signal input

 

 

 

 

 

 

 

 

 

14

PIP RST

PIP RESET

Out

Reset = L

 

 

 

 

 

 

 

 

 

15

AFT2 IN

 

In

Sub tuner AFT S-curve input

 

 

 

 

 

 

 

 

 

16

AFT1

UV MAIN S-CURVE

In

Main tuner AFT S-curve

 

 

 

 

SIGNAL

 

signal input

 

 

 

 

 

 

 

 

 

17

KEY A

LOCAL KEY INPUT

In

Local key detection: 0 to 5V

 

 

 

 

 

 

 

 

 

18

KEY B

LOCAL KEY INPUT

In

Local key detection: 0 to 5V

 

 

 

 

 

 

 

 

 

19

SGV

TEST SIGNAL OUT

Out

Test signal output In normal = L

0V

 

 

 

 

 

 

 

 

20

SGA

TEST AUDIO OUT

Out

Test audio output In normal = L

0V

 

 

 

 

 

 

 

 

21

VSS

POWER GROUNDING

0V: Gounding voltage

0V

 

 

 

 

 

 

 

 

22

CLK

CLOCK OSD

Out

 

At display on: Pulse

 

 

 

 

 

 

 

 

23

CS

CHIP SELECT

Out

 

At display on: Pulse

 

 

 

 

 

 

 

 

24

BUSY

BUSY OSD

In

 

At display on: Pulse

 

 

 

 

 

 

 

 

25

DATA

DATA OSD

Out

 

At display on: Pulse

 

 

 

 

 

 

 

 

26

OSD RESET

RESET OSD

Out

Reset = L

 

 

 

 

 

 

 

 

 

27

VSYNC

 

In

VSYNC

Pulse

 

 

 

 

 

 

 

 

28

OSC1

DISPLAY CLOCK

Out

4.5MHz

Pulse

 

 

 

 

 

 

 

 

29

OSC2

DISPLAY CLOCK

In

 

Pulse

 

 

 

 

 

 

 

 

30

TEST

TEST MODE

In

GND fixed

0V

 

 

 

 

 

 

 

 

31

XIN

SYSTEM CLOCK

In

System clock input

8MHz pulse

 

 

 

 

 

 

 

 

32

XOUT

SYSTEM CLOCK

Out

System clock output 8MHz

8MHz pulse

 

 

 

 

 

 

 

 

33

RESET

SYSTEM RESET

In

System reset input (In reset = L)

5V

 

 

 

 

 

 

 

 

34

EXT SP

EXTERNAL SPEAKER

In

EXTERNAL = L, INT = H

 

 

 

 

 

 

 

 

 

35

RMT IN

REMOTE CONTROL

In

In remote control pulse input = L

In reception of

 

 

 

SIGNAL INPUT

 

 

remote pulse

 

 

 

 

 

 

 

 

36

SYNC AV1

HSYNC INPUT

In

External H. sync signal input

Pulse

 

 

 

 

 

 

 

 

37

SCL1

IIC BUS CLOCK OUT

Out

IIC bus clock output 1

Pulse

 

 

 

 

 

 

 

 

38

SDA1

IIC BUS DATA IN/OUT

In/Out

IIC bus data input/output 1

Pulse

 

 

 

 

 

 

 

 

39

I2C STP

IIC BUS STOP

In

STOP = L

 

 

40

SS VD

STARSIGHT VD

In

VSYNC for Starsight

Pulse

 

 

 

 

 

 

 

 

41

ACP

NSYNC INPUT

In

AC pulse input

 

 

 

 

 

 

 

 

 

42

VDD

POWER

5V

5V

20

Image 20
Contents TW40F80 Contents Terminal FUNCTION, Description and Block Diagram Wide Aspect Conversion Circuit Failure AnalysisSection X Deflection Distortion Correction Circuit Section XI Digital Convergence CircuitSection Feature Improved ServiceabilityOutline Merits of BUS System Reduction of Parts CountSpecifications Chassis ModelFront View Video 3 InputsRear View IN-VIDEORemote Control View 100Chassis Layout Starsight Newosd FRO. SurrConstruction of Chassis Major Features Section II TUNER, IF/MTS/S. PRO Module Circuit BlockOutline RF AGCAudio Multiplex Demodulation Circuit A.PRO block diagram A.PRO Section Audio ProcessorConfiguration of the audio circuit and signal flow are given POP Tuner Terminal No NameOperation of Channel Selection Circuit Microcomputer SDA SCLMicrocomputer Terminal Function Microcomputer Terminal Name and Operation Logic Terminal Name Function In/Out Logic RemarksSDA On Screen FunctionEEPROMQA02 System Block Diagram Local KEY Detection Method Local key assignment FunctionTo TV set Remote Control Code AssignmentCode Function Custom codes are 40-BFH TV set for North U.S.A Code Function Optional Setting for Each Model OPT0 OPT1 Models HEXService Adjustment Entering to Service ModeTest Signal Selection Executing Self Diagnosis Function Failure Diagnosis ProcedureContents to be Confirmed by Customer Understanding Self Diagnosis Indication Self CheckClearing method of self diagnosis result YES Troubleshooting ChartTV does Not Turned on No Acception of KEY-IN No Picture Snow NoiseMemory Circuit Check No Indication On ScreenSection IV DVD Switch Circuit DVD Switch Block Diagram Outline Configuration Section V WAC Circuit OutlineCircuit Operation OperationWide aspect conversion unit block diagram PB6348 Pin Function Pin function of TC9097F QFP 80 pinNames and functions of TC9097F Name FunctionVFL2 Block Diagram TC9097F system block diagramWide Aspect Conversion Circuit Failure Analysis Procedures E2PROM OK?Adjustment Method Raster Horizontal OneScreen multi-search process Section VI Dual Circuit OutlinePrinciples of Operation System Component Diagram of Dual Unit Video/Color/Deflection Process Section OSD Sub Screen Process Section Sub screen process sectionMain/Sub Screen Superimposing Section Main/Sub screen superimposing sectionMain IC Terminal FUNCTION, Description and Block Diagram DiagramQY01 MPC1832GTQY01 mPC1832GT pin layout QY03 TC9092AF internal block diagram QY03 TC9092AF pin layout QY03 TC9092AF pin list No Pin name Pin function CKWMRD1 QY10/QY11 M518221-30ZS internal block diagram Circuit Description Section VII 3-DIMENSION Y/C Separator Circuit OutlineConfiguration Circuit Description Terminal description PZ01 Section Viii Vertical Output Circuit Outline Theory of OperationOutput Circuit Actual CircuitSawtooth Waveform Generation Circuit OperationOutput Output stage power supply voltage Linearity Characteristic Correction Protection Circuit for V Deflection StopCharacter Correction Up-and Down-ward Extension Correction Up-and Down-ward Linearity Balance+35V Over Current Protection Circuit Theory of OperationUZ22BSD UZ11BSBRaster Position Switching Circuit KetsuSignal Section IX Horizontal Deflection Circuit OutlineHorizontal Drive Circuit Basic Operation of Horizontal DriveOn period OFF period Signal DEF/POWER PCB Horizontal Output CircuitOperation of Basic Circuit FBTDescription of the basic circuit T1~t2 T2~t3T3~t4 T4~t6Curve Correction S Capacitor Amplitude CorrectionLinearity Correction LIN Left-right Asymmetrical Correction LIN coil Linearity coilWhite Peak Bending Correction Circuit OutlineOperation Theory EHTBlanking Low Voltage Protection Gate ProtectorHigh Voltage Generation Circuit AFCABL High Voltage DPC Circuit RegulatorHigh Voltage 1. +210V2. +35V Anode High Voltage CircuitCR-BLOCK ED’ ActualFBT CR-BLOCK E H RAY Protection Circuit 23 X-RAY protection circuitOver Current Protection Circuit Functions and Features Block DiagramDiode Modulator Circuit OUTActual Circuit First Half Scanning Period Basic Operation and Current PathLater Half Scanning Period P.T Later Half of Flyback PeriodFirst Half of Scanning Period Section XI Digital Convergence Circuit Outline Reset MemoryProm PLLPicture Adjustment Service Mode Entering/Exiting ModeSfull Initial screenFirst screen Second screen Key function of remote control unit ENTNormal/Full Operation procedureEach Screen Adjustment Method Theater Wide1 Theater Wide 269.5 Case Study When CRT is ReplacedWhen Convergence Unit is Replaced Adjusting Procedure in Replacing Convergence Unit/Main Def TroubleshootingAdjusting Procedure in Replacing CRT Convergence Output Circuit Convergence Block Diagram Convergence Troubleshooting Chart Main Unit