Toshiba TW40F80 manual Osd

Page 47

Signalreception

Sub screen

microprocessor

section

I2C BUS(SCL,SDA)

processsection

circuit

OSD

QY91 CXP85116B-514Q

OSD

QY44

PY01

QY49

MC74HC4053F

SCLP 50

TC4W53F

QY01 µPC1832GT

5

Y13

SCL

49 SCL2 SDAP 48

OSD

9

11

To Sub screen

Y14

SDA

47 SDA2

BLK 46

V/C/D IC

Y OUT 12

superimpose

1

12

OSD superimpose

Y

B 43

7

14

COL 53

20

COLOR

R-Y OUT 13

5

4

TIN 54

21

TINT

B-Y OUT 14

2

15

S.COL 51

37

SUB COL.

CON 52

38

CONTRAST

R-Y IN 18

fsc SEL 62

41

fsc SELECT

PAL/NTSC 61

42

PAL/NTSC

B-Y IN 19

3.58

2

Control

QY22 MM1031XMR

I

Sub screen

control

R OUT(I) 23

3

6dB. Amp

1

microprocessor

B OUT(Q) 24

3

6dB. Amp

1

Q

39

SYNC SEPA

PIP VIDEO

IN

QY23 MM1031XMR

Y08

L.P.F

36

VIDEO IN

QY42 TC74HC123AF

1Q

13

WHD2

PIP C

HD OUT 10

1

1A

Waveform

Y15

34

CHROMA IN

WHD1

B.P.F

shape

2Q

5

VD OUT 11

Fig. 6-2

47

WVD

Image 47

Contents TW40F80 Contents Wide Aspect Conversion Circuit Failure Analysis Terminal FUNCTION, Description and Block DiagramSection XI Digital Convergence Circuit Section X Deflection Distortion Correction CircuitReduction of Parts Count Section FeatureImproved Serviceability Outline Merits of BUS SystemChassis Model SpecificationsVideo 3 Inputs Front ViewIN-VIDEO Rear View100 Remote Control ViewStarsight Newosd FRO. Surr Chassis LayoutConstruction of Chassis RF AGC Major FeaturesSection II TUNER, IF/MTS/S. PRO Module Circuit Block OutlineAudio Multiplex Demodulation Circuit A.PRO Section Audio Processor A.PRO block diagramConfiguration of the audio circuit and signal flow are given Terminal No Name POP TunerOperation of Channel Selection Circuit SDA SCL MicrocomputerMicrocomputer Terminal Function Terminal Name Function In/Out Logic Remarks Microcomputer Terminal Name and Operation LogicSDA On Screen FunctionEEPROMQA02 System Block Diagram Local key assignment Function Local KEY Detection MethodTo TV set Remote Control Code AssignmentCode Function Custom codes are 40-BFH TV set for North U.S.A Code Function OPT0 OPT1 Models HEX Optional Setting for Each ModelService Adjustment Entering to Service ModeTest Signal Selection Executing Self Diagnosis Function Failure Diagnosis ProcedureContents to be Confirmed by Customer Self Check Understanding Self Diagnosis IndicationClearing method of self diagnosis result YES Troubleshooting ChartTV does Not Turned on No Picture Snow Noise No Acception of KEY-INNo Indication On Screen Memory Circuit CheckSection IV DVD Switch Circuit DVD Switch Block Diagram Outline Operation ConfigurationSection V WAC Circuit Outline Circuit OperationWide aspect conversion unit block diagram PB6348 Pin function of TC9097F QFP 80 pin Pin FunctionName Function Names and functions of TC9097FVFL2 TC9097F system block diagram Block DiagramE2PROM OK? Wide Aspect Conversion Circuit Failure Analysis ProceduresRaster Horizontal One Adjustment MethodScreen multi-search process Section VI Dual Circuit OutlinePrinciples of Operation System Component Diagram of Dual Unit Video/Color/Deflection Process Section OSD Sub screen process section Sub Screen Process SectionMain/Sub screen superimposing section Main/Sub Screen Superimposing SectionMPC1832GT Main IC Terminal FUNCTION, Description and Block DiagramDiagram QY01QY01 mPC1832GT pin layout QY03 TC9092AF internal block diagram QY03 TC9092AF pin layout CKW QY03 TC9092AF pin list No Pin name Pin functionMRD1 QY10/QY11 M518221-30ZS internal block diagram Circuit Description Section VII 3-DIMENSION Y/C Separator Circuit OutlineConfiguration Circuit Description Terminal description PZ01 Theory of Operation Section Viii Vertical Output Circuit OutlineCircuit Operation Output CircuitActual Circuit Sawtooth Waveform GenerationOutput Output stage power supply voltage Up-and Down-ward Linearity Balance Linearity Characteristic CorrectionProtection Circuit for V Deflection Stop Character Correction Up-and Down-ward Extension CorrectionUZ11BSB +35V Over Current Protection CircuitTheory of Operation UZ22BSDKetsu Raster Position Switching CircuitBasic Operation of Horizontal Drive SignalSection IX Horizontal Deflection Circuit Outline Horizontal Drive CircuitOn period OFF period FBT Signal DEF/POWER PCBHorizontal Output Circuit Operation of Basic CircuitT4~t6 Description of the basic circuit T1~t2T2~t3 T3~t4Curve Correction S Capacitor Amplitude CorrectionLinearity Correction LIN Linearity coil Left-right Asymmetrical Correction LIN coilEHT White Peak Bending Correction CircuitOutline Operation TheoryBlanking Gate Protector Low Voltage ProtectionHigh Voltage DPC Circuit Regulator High Voltage Generation CircuitAFC ABLHigh Voltage 1. +210V2. +35V Anode High Voltage CircuitCR-BLOCK ED’ ActualFBT CR-BLOCK E H 23 X-RAY protection circuit RAY Protection CircuitOver Current Protection Circuit Block Diagram Functions and FeaturesOUT Diode Modulator CircuitActual Circuit First Half Scanning Period Basic Operation and Current PathLater Half Scanning Period P.T Later Half of Flyback PeriodFirst Half of Scanning Period Section XI Digital Convergence Circuit Outline PLL ResetMemory PromPicture Adjustment Entering/Exiting Mode Service ModeSfull Initial screenFirst screen Second screen ENT Key function of remote control unitNormal/Full Operation procedureEach Screen Adjustment Method Theater Wide1 Theater Wide 269.5 Case Study When CRT is ReplacedWhen Convergence Unit is Replaced Adjusting Procedure in Replacing Convergence Unit/Main Def TroubleshootingAdjusting Procedure in Replacing CRT Convergence Output Circuit Convergence Block Diagram Convergence Troubleshooting Chart Main Unit