Toshiba TW40F80 Output Circuit, Actual Circuit, Sawtooth Waveform Generation, Circuit Operation

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2. V OUTPUT CIRCUIT

2-1. Actual Circuit

Q501

31

	C322				D309
	C322		+9V
			+9V
					R308		C308
					D308
15		3	+35V					D301	C313
15		3							C313
R329					7	6
					7	6
							3	R303
							3
14	Q302	6		4	Q301			L301	R336
14	Q302	6		4				L301	R336
C321							2		C307
					1	5			C307
					1	5		R307	L462+L463+L464
R320			R301					R307	L462+L463+L464
R320			R301
13		8						R306
			C314		C309		C311
			C314						C306
								R313	C306
								R313
			R330
								C305
		C319						R304	R305
				Fig. 8-3

2-2. Sawtooth Waveform Generation

2-2-1. Circuit Operation

The sawtooth waveform generation circuit consists of as shown in Fig. 8-4. When a trigger pulse enters pin 13, it is differentiated in the waveform shape circuit and only the falling part is detected by the trigger detection circuit, to the waveform generation circuit is not susceptible to variations of input pulse width.

The pulse generation circuit also works to fix the V ramp voltage at a reference voltage when the trigger pulse enters, so it can prevent the sawtooth wave start voltage from variations by horizontal components, thus improving interlacing characteristics.

		13	WAVEFORM	TRIGGER	PULSE	V. LAMP	AGC
	5Vp	13	SHAPE	DET.	GAIN	V. LAMP	AGC
			SHAPE	DET.	GAIN

	DC=0V
					14	15	16
				R329	C321	C322	C323
						+
						+9V
				Fig. 8-4

60

Image 60

Contents TW40F80 Contents Terminal FUNCTION, Description and Block Diagram Wide Aspect Conversion Circuit Failure AnalysisSection X Deflection Distortion Correction Circuit Section XI Digital Convergence CircuitSection Feature Improved ServiceabilityOutline Merits of BUS System Reduction of Parts CountSpecifications Chassis ModelFront View Video 3 InputsRear View IN-VIDEORemote Control View 100Chassis Layout Starsight Newosd FRO. SurrConstruction of Chassis Major Features Section II TUNER, IF/MTS/S. PRO Module Circuit BlockOutline RF AGCAudio Multiplex Demodulation Circuit A.PRO block diagram A.PRO Section Audio ProcessorConfiguration of the audio circuit and signal flow are given POP Tuner Terminal No NameOperation of Channel Selection Circuit Microcomputer SDA SCLMicrocomputer Terminal Function Microcomputer Terminal Name and Operation Logic Terminal Name Function In/Out Logic RemarksOn Screen Function EEPROMQA02SDA System Block Diagram Local KEY Detection Method Local key assignment FunctionRemote Control Code Assignment Code FunctionTo TV set Custom codes are 40-BFH TV set for North U.S.A Code Function Optional Setting for Each Model OPT0 OPT1 Models HEXEntering to Service Mode Test Signal SelectionService Adjustment Failure Diagnosis Procedure Contents to be Confirmed by CustomerExecuting Self Diagnosis Function Understanding Self Diagnosis Indication Self CheckClearing method of self diagnosis result Troubleshooting Chart TV does Not Turned onYES No Acception of KEY-IN No Picture Snow NoiseMemory Circuit Check No Indication On ScreenSection IV DVD Switch Circuit DVD Switch Block Diagram Outline Configuration Section V WAC Circuit OutlineCircuit Operation OperationWide aspect conversion unit block diagram PB6348 Pin Function Pin function of TC9097F QFP 80 pinNames and functions of TC9097F Name FunctionVFL2 Block Diagram TC9097F system block diagramWide Aspect Conversion Circuit Failure Analysis Procedures E2PROM OK?Adjustment Method Raster Horizontal OneSection VI Dual Circuit Outline Principles of OperationScreen multi-search process System Component Diagram of Dual Unit Video/Color/Deflection Process Section OSD Sub Screen Process Section Sub screen process sectionMain/Sub Screen Superimposing Section Main/Sub screen superimposing sectionMain IC Terminal FUNCTION, Description and Block Diagram DiagramQY01 MPC1832GTQY01 mPC1832GT pin layout QY03 TC9092AF internal block diagram QY03 TC9092AF pin layout QY03 TC9092AF pin list No Pin name Pin function CKWMRD1 QY10/QY11 M518221-30ZS internal block diagram Section VII 3-DIMENSION Y/C Separator Circuit Outline Configuration Circuit Description Circuit Description Terminal description PZ01 Section Viii Vertical Output Circuit Outline Theory of OperationOutput Circuit Actual CircuitSawtooth Waveform Generation Circuit OperationOutput Output stage power supply voltage Linearity Characteristic Correction Protection Circuit for V Deflection StopCharacter Correction Up-and Down-ward Extension Correction Up-and Down-ward Linearity Balance+35V Over Current Protection Circuit Theory of OperationUZ22BSD UZ11BSBRaster Position Switching Circuit KetsuSignal Section IX Horizontal Deflection Circuit OutlineHorizontal Drive Circuit Basic Operation of Horizontal DriveOn period OFF period Signal DEF/POWER PCB Horizontal Output CircuitOperation of Basic Circuit FBTDescription of the basic circuit T1~t2 T2~t3T3~t4 T4~t6Amplitude Correction Linearity Correction LINCurve Correction S Capacitor Left-right Asymmetrical Correction LIN coil Linearity coilWhite Peak Bending Correction Circuit OutlineOperation Theory EHTBlanking Low Voltage Protection Gate ProtectorHigh Voltage Generation Circuit AFCABL High Voltage DPC Circuit Regulator1. +210V 2. +35VHigh Voltage High Voltage Circuit CR-BLOCKAnode Actual FBT CR-BLOCK E HED’ RAY Protection Circuit 23 X-RAY protection circuitOver Current Protection Circuit Functions and Features Block DiagramDiode Modulator Circuit OUTActual Circuit Basic Operation and Current Path Later Half Scanning PeriodFirst Half Scanning Period Later Half of Flyback Period First Half of Scanning PeriodP.T Section XI Digital Convergence Circuit Outline Reset MemoryProm PLLPicture Adjustment Service Mode Entering/Exiting ModeInitial screen First screen Second screenSfull Key function of remote control unit ENTOperation procedure Each Screen Adjustment MethodNormal/Full Theater Wide1 Theater Wide 269.5 When CRT is Replaced When Convergence Unit is ReplacedCase Study Troubleshooting Adjusting Procedure in Replacing CRTAdjusting Procedure in Replacing Convergence Unit/Main Def Convergence Output Circuit Convergence Block Diagram Convergence Troubleshooting Chart Main Unit