Toshiba TW40F80 manual MRD1

Page 55

Table 6-2 QY03 TC9092AF pin list (No. 2)

No.

Pin name

I/O

Pin function

 

 

 

 

51

MRD1

I

Data input terminal

 

 

 

 

52

MRD2

I

Data input terminal

 

 

 

 

53

MRD3

I

Data input terminal

54

MRD4

I

Data input terminal

 

 

 

 

55

MRD5

I

Data input terminal

 

 

 

 

56

MRD6

I

Data input terminal

 

 

 

 

57

MRD7

I

Data input terminal

 

 

 

 

58

MRD8

I

Data input terminal

 

 

 

 

59

MRD9

I

Data input terminal

 

 

 

 

60

MRD10

I

Data input terminal

61

MRD11

I

Data input terminal

 

 

 

 

62

MRD12

I

Data input terminal

 

 

 

 

63

MRD13

I

Data input terminal

 

 

 

 

64

MRD14

I

Data input terminal

 

 

 

 

65

MRD15

I

Data input terminal

 

 

 

 

66

RE

O

Read enable output terminal

 

 

 

 

67

RSTR

O

Read reset output terminal

 

 

 

 

68

CKR

O

Serial read clock output terminal

 

 

 

 

69

CKRI

I

Memory read clock input

 

 

 

 

70

YSOUT

O

Ys signal output terminal

 

 

 

 

71

VSS

 

Digital GND

 

 

 

 

72

OSCMI

I

Oscillator connection terminal main input

 

 

 

 

73

OSCMO

O

Oscillator connection terminal main output

 

 

 

 

74

VDD

 

Digital power supply

 

 

 

 

75

FHM

I

Main screen horizontal sync signal input

76

NFHM

I

Main screen horizontal sync signal reversing input

 

 

 

 

77

FVM

I

Main screen vertical sync signal input

 

 

 

 

78

VSS

 

Digital GND

 

 

 

 

79

SCL

I

I2C CK input terminal

80

SDA

BID

I2C data I/O terminal

81

SDAINO

O

I2C data direction output terminal, Test output terminal

82

VSS

 

Digital GND

 

 

 

 

83

PROMDI

I

ROM data input terminal

 

 

 

 

84

PROMCK

O

ROM clock output terminal

 

 

 

 

85

PROMRES

O

ROM RESET output terminal

 

 

 

 

86

ME

I

MEMORY polarity control input terminal

 

 

 

 

87

RESET

I

RESET input terminal

 

 

 

 

88

TEST1

I

TEST input terminal

 

 

 

 

89

TESTAD

I

AD/DA TEST input terminal

 

 

 

 

90

VDD

 

Digital power supply

 

 

 

 

91

NC

 

 

 

 

 

 

92

DAVREFY

I

D/A Y reference voltage input terminal (4V)

 

 

 

 

93

DABIAS1

 

D/A bias condenser connection terminal

 

 

 

 

94

DAVDD

 

D/A power supply

95

YOUT

O

D/A Y output terminal

 

 

 

 

96

DAVSS

 

D/A GND

 

 

 

 

97

RYOUT

O

D/A R – Y output terminal

 

 

 

 

98

DAVREFC

I

D/A C reference voltage input terminal (3V)

 

 

 

 

99

DAVDD

 

D/A power supply

 

 

 

 

100

BYOUT

O

D/A B – Y output terminal

 

 

 

 

55

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Contents TW40F80 Contents Wide Aspect Conversion Circuit Failure Analysis Terminal FUNCTION, Description and Block DiagramSection XI Digital Convergence Circuit Section X Deflection Distortion Correction CircuitReduction of Parts Count Section FeatureImproved Serviceability Outline Merits of BUS SystemChassis Model SpecificationsVideo 3 Inputs Front ViewIN-VIDEO Rear View100 Remote Control ViewStarsight Newosd FRO. Surr Chassis LayoutConstruction of Chassis RF AGC Major FeaturesSection II TUNER, IF/MTS/S. PRO Module Circuit Block OutlineAudio Multiplex Demodulation Circuit A.PRO Section Audio Processor A.PRO block diagramConfiguration of the audio circuit and signal flow are given Terminal No Name POP TunerOperation of Channel Selection Circuit SDA SCL MicrocomputerMicrocomputer Terminal Function Terminal Name Function In/Out Logic Remarks Microcomputer Terminal Name and Operation LogicEEPROMQA02 On Screen FunctionSDA System Block Diagram Local key assignment Function Local KEY Detection MethodCode Function Remote Control Code AssignmentTo TV set Custom codes are 40-BFH TV set for North U.S.A Code Function OPT0 OPT1 Models HEX Optional Setting for Each ModelTest Signal Selection Entering to Service ModeService Adjustment Contents to be Confirmed by Customer Failure Diagnosis ProcedureExecuting Self Diagnosis Function Self Check Understanding Self Diagnosis IndicationClearing method of self diagnosis result TV does Not Turned on Troubleshooting ChartYES No Picture Snow Noise No Acception of KEY-INNo Indication On Screen Memory Circuit CheckSection IV DVD Switch Circuit DVD Switch Block Diagram Outline Operation ConfigurationSection V WAC Circuit Outline Circuit OperationWide aspect conversion unit block diagram PB6348 Pin function of TC9097F QFP 80 pin Pin FunctionName Function Names and functions of TC9097FVFL2 TC9097F system block diagram Block DiagramE2PROM OK? Wide Aspect Conversion Circuit Failure Analysis ProceduresRaster Horizontal One Adjustment MethodPrinciples of Operation Section VI Dual Circuit OutlineScreen multi-search process System Component Diagram of Dual Unit Video/Color/Deflection Process Section OSD Sub screen process section Sub Screen Process SectionMain/Sub screen superimposing section Main/Sub Screen Superimposing SectionMPC1832GT Main IC Terminal FUNCTION, Description and Block DiagramDiagram QY01QY01 mPC1832GT pin layout QY03 TC9092AF internal block diagram QY03 TC9092AF pin layout CKW QY03 TC9092AF pin list No Pin name Pin functionMRD1 QY10/QY11 M518221-30ZS internal block diagram Configuration Circuit Description Section VII 3-DIMENSION Y/C Separator Circuit OutlineCircuit Description Terminal description PZ01 Theory of Operation Section Viii Vertical Output Circuit OutlineCircuit Operation Output CircuitActual Circuit Sawtooth Waveform GenerationOutput Output stage power supply voltage Up-and Down-ward Linearity Balance Linearity Characteristic CorrectionProtection Circuit for V Deflection Stop Character Correction Up-and Down-ward Extension CorrectionUZ11BSB +35V Over Current Protection CircuitTheory of Operation UZ22BSDKetsu Raster Position Switching CircuitBasic Operation of Horizontal Drive SignalSection IX Horizontal Deflection Circuit Outline Horizontal Drive CircuitOn period OFF period FBT Signal DEF/POWER PCBHorizontal Output Circuit Operation of Basic CircuitT4~t6 Description of the basic circuit T1~t2T2~t3 T3~t4Linearity Correction LIN Amplitude CorrectionCurve Correction S Capacitor Linearity coil Left-right Asymmetrical Correction LIN coilEHT White Peak Bending Correction CircuitOutline Operation TheoryBlanking Gate Protector Low Voltage ProtectionHigh Voltage DPC Circuit Regulator High Voltage Generation CircuitAFC ABL2. +35V 1. +210VHigh Voltage CR-BLOCK High Voltage CircuitAnode FBT CR-BLOCK E H ActualED’ 23 X-RAY protection circuit RAY Protection CircuitOver Current Protection Circuit Block Diagram Functions and FeaturesOUT Diode Modulator CircuitActual Circuit Later Half Scanning Period Basic Operation and Current PathFirst Half Scanning Period First Half of Scanning Period Later Half of Flyback PeriodP.T Section XI Digital Convergence Circuit Outline PLL ResetMemory PromPicture Adjustment Entering/Exiting Mode Service ModeFirst screen Second screen Initial screenSfull ENT Key function of remote control unitEach Screen Adjustment Method Operation procedureNormal/Full Theater Wide1 Theater Wide 269.5 When Convergence Unit is Replaced When CRT is ReplacedCase Study Adjusting Procedure in Replacing CRT TroubleshootingAdjusting Procedure in Replacing Convergence Unit/Main Def Convergence Output Circuit Convergence Block Diagram Convergence Troubleshooting Chart Main Unit
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