Details on using the diagnostic tests, Cache

Alt+C	Set Contrast 0-255. Systems with a DSTN display can specify a display contrast
	from 0 to 255. This exceeds the normal range permitted with the contrast buttons
	and can result in a blank display. Repeat the command with a less extreme value
	to restore the display.
Alt+D	Set device type that should be found in the dock port. Once specified, the
	“Docked device” test will only pass if the correct device is found. The OmniBook
	dock port can accept either a SCSI cable for connection to a tower, or a dock
	device. Specify N, S, or D when prompted for nothing, SCSI cable, or dock.
Alt+F	Set Fast IR loopback mode. The fast I/R test requires two OmniBooks with their
	I/R ports directed at each other. One OmniBook must be run in fast IR loopback
	mode. To put an OmniBook into this mode either use this command or use the /f
	command line option when starting Diag. To exit this mode press the <Esc> key.
Alt+I	Enter Idle state. This command puts the OmniBook in a low power state while still
	maintaining full readiness to run. Press any key to resume.
Alt+N	Enter a Note to log to disk file. When logging to a disk file has been enabled with
	<Ctrl+L>, this command can be used to permit entering a line of text, then logging
	the text to the log file DIAG.LOG

Details on using the diagnostic tests

Details for the various tests are described below. The levels permitted for each test and a brief note on hardware or other options are described.

Numerous tests involve pattern testing to determine if the hardware can accept the various data combinations required. Tests that make use of 18 data patterns use the following pattern set: 0FFFFh, 00000h, 0F0F0h, 0AAAAh, 05555h, 08080h, 04040h, 2020h, 01010h, 00808h, 00404h, 00202h, 00101h, 01111h, 02222h, 04444h, and 08888h. These data patterns are used in place of “walking bits”, “checkerboards”, and “bit stuck high/low”.

CPU

Level: 2. The CPU test contains numerous subtests as follows. The CPU register test writes the 18 data patterns to the registers and reads them back to verify correctness. The CPU arithmetic test performs ACD, ADD, DEC, DIV, IDIV, IMUL, INC, MUL, SBB and SUB with 16 and 32 bit operands. The CPU logical test performs AND, NOT, OR, and XOR with 16 and 32 bit operands. The CPU string test performs LODS, MOVS, SCAS, and STOS with 16 and 32 bit operands. The CPU interrupts / exceptions tests software interrupts and real-mode accessible exceptions; if Diag is running in a DOS box, Windows prevents testing all exceptions but divide by 0. The coprocessor tests the numeric coprocessor register stack, exception handling, arithmetic, comparison, and transcendental operations. Failures are reported by register and operation. A final test of CPU speed is performed to ensure measured speed is within 10% of the expected value, values below this will fail the test.

Cache

Level: 2. This tests the translation lookaside buffer and the Pentium on-chip cache first with register addressability, then with the 18 test patterns. No memory managers may be installed for this test to run.

RAM, motherboard

Levels: 1,2,3. The level 1 test performs an address test only with the 18 data patterns. The level 2 test performs a pattern test, address test, bus throughput, and code test. The level 3 test does what level 2 does except the pattern and address tests are repeated 10 times. The