Texas Instruments MSP430x4xx manuals
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Texas Instruments MSP430x4xx Manual
512 pages 1.9 Mb
Preface 3 Read This FirstAbout This Manual Related Documentation From Texas Instruments FCC Warning Notational Conventions 4 Glossary5 Register Bit ConventionsRegister Bit Accessibility and Initial Condition 7 Contents14 Introduction35 110 126 147 154 Hardware Multiplier161 184 Digital I/O191 201 210 Timer_A233 Timer_B258 259 14.1 USART Introduction: UART Mode261 14.2 USART Operation: UART Mode271 USART Operation: UART Mode 14-16 USART Peripheral Interface, UART Mode 273 Typical Baud Rates and ErrorsTable 142.Commonly Used Baud Rates, Baud Rate Data, and Errors 274 14.2.7 USART InterruptsUSART Transmit Interrupt Operation Figure 1410. Transmit Interrupt Operation 275 USART Receive Interrupt OperationFigure 1411.Receive Interrupt Operation 276 Receive-Start Edge Detect Operation277 Figure 1412. Glitch Suppression, USART Receive Not StartedFigure 1413. Glitch Suppression, USART Activated 278 14.3 USART Registers: UART ModeTable 143.USART0 Control and Status Registers Table 144.USART1 Control and Status Registers 279 UxCTL, USART Control Register280 UxTCTL, USART Transmit Control Register281 UxRCTL, USART Receive Control RegisterUSART Registers: UART Mode 14-25USART Peripheral Interface, UART Mode 282 UxBR0, USART Baud Rate Control Register 0UxBR1, USART Baud Rate Control Register 170Modulation bits. These bits select the modulation for BRCLK.UxBRx The valid baud-rate control range is 3 UxBR < 0FFFFh, where UxBR = {UxBR1+UxBR0}. Unpredictable receive and transmit timing occurs if UxBR <3. UxMCTL, USART Modulation Control Register 283 UxRXBUF, USART Receive Buffer RegisterUxTXBUF, USART Transmit Buffer Register 284 ME1, Module Enable Register 1ME2, Module Enable Register 2 287 USART Peripheral Interface, SPI Mode288 15.1 USART Introduction: SPI Mode290 15.2 USART Operation: SPI Mode299 15.3 USART Registers: SPI ModeTable 151.USART0 Control and Status Registers Table 152.USART1 Control and Status Registers 300 UxCTL, USART Control Register301 UxTCTL, USART Transmit Control Register302 UxRCTL, USART Receive Control RegisterUSART Registers: SPI Mode 15-17USART Peripheral Interface, SPI Mode 303 UxBR0, USART Baud Rate Control Register 0UxBR1, USART Baud Rate Control Register 1to 000h. 70The modulation control register is not used for SPI mode and should be setUxBRx The baud-rate generator uses the content of {UxBR1+UxBR0} to set the baud rate. Unpredictable SPI operation occurs if UxBR < 2. UxMCTL, USART Modulation Control Register 304 UxRXBUF, USART Receive Buffer RegisterUxTXBUF, USART Transmit Buffer Register 305 ME1, Module Enable Register 1ME2, Module Enable Register 2 308 OA321 Comparator_A332 LCD Controller351 LCD_A Controller377 ADC12404 SD16427 SD16_A447 DAC12461 462 24.1 Scan IF Introduction464 24.2 Scan IF Operation495 24.3 Scan IF RegistersThe Scan IF registers are listed in Table 249. Table 249.Scan IF Registers 496 SIFDEBUG, Scan IF Debug Register, Write ModeSIFDEBUG, Scan IF Debug Register, Read Mode After 00h Is Written 497 SIFDEBUG, Scan IF Debug Register, Read Mode After 01h Is WrittenSIFDEBUG, Scan IF Debug Register, Read Mode After 02h Is Written 498 SIFDEBUG, Scan IF Debug Register, Read Mode After 03h Is Written499 SIFCNT, Scan IF Counter RegisterSIFPSMV, Scan IF Processing State Machine Vector Register 500 SIFCTL1, Scan IF Control Register 1502 SIFCTL2, Scan IF Control Register 2504 SIFCTL3, Scan IF Control Register 3506 SIFCTL4, Scan IF Control Register 4508 SIFCTL5, Scan IF Control Register 5509 SIFDACRx, Digital-To-Analog Converter Registers510 SIFTSMx, Scan IF Timing State Machine Registers512 Processing State Machine Table Entry (MSP430 Memory Location)
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