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Table 4-1. Quick Reference Guide to Major Circuits
Dependent Circuits
Circuit Major Function Input from Output to Operation
Bias Power
Supply (BPS)
Provides Bias and
Reference Voltage.
Mains Control Circuits Mains voltage at BVS input is
converted to lower voltage levels to
provide the internal operating voltages
for the various circuits.
Bias Voltage
Detector (BVD)
Delays the unit's
operation at power-
on.
BVS Delay Circuit,
OVP
Holds all circuits reset until all internal
voltages are at acceptable levels.
Timed Delay
Circuit (TDC)
Enables power
circuits.
BVD: DOD PWM; Relay Waits for 3 seconds after power-on and
then shuts out inrush current limiting
resistor. The circuit is triggered by the
BVD when the + VDC is stable.
Power Limit
Comparator (PLC)
Determines
maximum primary
current.
BVS; Ramp PWM Compares VIP RAMP with VREF and
produces a signal to inhibit the PWM
when V IP RAMP > V REF.
Control Voltage
Comparator
(CVC)
Regulates the
operation of the
PWM.
V IP RAMP Control
Port Voltage (VCP)
PWM Compares VIP RAMP with VCP and
produces a signal to inhibit the PWM
when VIP RAMP > VCP.
Constant Voltage
Circuit (CV)
Produces CV
Control Voltage.
Outer Voltage
Sense (OVS)
Innerloop Voltage
Sense (IVS) CV
Program Voltage
CVC,
Display
Circuits
Monitors OVS signals from which
VMON is derived. Combines OVS and
IVS to give CV Control Voltage.
Constant Current
Circuit (CC)
Produces CC
Control Voltage.
Outer Current
Sense (OCS). CC
Program Voltage
CVC; Display
Circuits
Monitors OCS signals from which
l-MON is derived. Combines OCS and;
differentiated IVS to give the CC
control voltage.
Pulse Width
Modulator (PWM)
Switches FETs. Master Enable;
PLC, CVC
FETs Switching action achieved at 20KHz
rate with on-pulse activated by 20KHz
clock and off-pulse by CVC, PLC,
20KHz clock or shutdown circuits.
Primary Current
Monitor
Transformer
Generates IP Ramp
Voltage.
FETs CVC; PLC Senses Ip current build-up while FETs
are on.
Power
Transformer
Stores and transfers
output power.
FETs Output Rectifier When FETs are on, the primary
windings of the transformer store
energy until the FETs are switched off
when the energy is transferred to the
secondary for output circuits.
A4 Q1,2,3,4 Control gating of
current in power,
and Sense
Transformers.
PWM Sensing
Transformer
FETs open and close in response to
pulses from the PWM. The length of its
on/off time depends on the duration of
the PWM on or off pulse.
Down
Programmer (DP)
Rapidly lowers
output voltage.
CV Circuit, OVP,
DOD
Output Rail Output filter capacitor are rapidly
discharged at varying ampere rates
depending on output voltage. Circuit
activated under condition of ac power
loss, shut down or low voltage.