VIP Port Adapter Functions
The MII receptacle uses
Figure 19 FE-TX MII Connection, Receptacle
Pin 21
H2943
ackscrew | Pin 1 |
Table 4 lists the MII connector pinout and signals. MII cables are available commercially.
Table 4 FE-TX MII Connector Pinout
Pin1 | In | Out | In/Out | Description |
– | Yes | – | Transmit Data (TxD) | |
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12 | Yes | – | – | 2 |
Transmit Clock (Tx_CLK) | ||||
11 | – | Yes | – | Transmit Error (Tx_ER) |
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13 | – | Yes | – | Transmit Enable (Tx_EN) |
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3 | – | Yes | – | MII Data Clock (MDC) |
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Yes | – | – | Receive Data (RxD) | |
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9 | Yes | – | – | Receive Clock (Rx_CLK) |
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10 | Yes | – | – | Receive Error (Rx_ER) |
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8 | Yes | – | – | Receive Data Valid (Rx_DV) |
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18 | Yes | – | – | Collision (COL) |
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19 | Yes | – | – | Carrier Sense (CRS) |
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2 | – | – | Yes | MII Data Input/Output (MDIO) |
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– | – | – | Common (ground) | |
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1, 20, 21, 40 | – | – | – | +5.0 volts (V) |
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1.Any pins not indicated are not used.
2.Tx_CLK and Rx_CLK are generated by the external transceiver.