Contec SPI-8450-LLVA - page 95

CHAPTER 8 - BIOS Setup
88 SPI-8450-LLVA
Description Choice
System BIOS Cacheable
Selecting Enabled allows caching of the
system BIOS ROM at F0000h-FFFFFh,
resulting in better system performance.
However, if any program writes to this
memory area, a system error may result.
Video BIOS Cacheable
Selecting Enabled allows caching of the video
BIOS ROM at C0000h to C7FFFh, resulting
in better video performance. However, if any
program writes to this memory area, a system
error may result.
Memory Hole At 15M-16M
You can reserve this area of system memory
for ISA adapter ROM. When this area is
reserved, it cannot be cached. The user
information of peripherals that need to use this
area of system memory usually discusses their
memory requirements.
Delay Transaction
The chipset has an embedded 32-bit posted
write buffer to support delay transactions
cycles. Select Enabled to support compliance
with PCI specification version 2.1.
Delay Prior to Thermal
Select the interval to setup the delay timer for
CPU Thermal-Throttling.