CY14B104L, CY14B104N

 

Figure 7. SRAM Read Cycle #2: CE and OE Controlled[3, 14, 18]

$GGUHVV

 

$GGUHVV9DOLG

 

 

 

W5&

W+=&(

&(

 

W$&(

 

 

 

 

 

 

W$$

 

 

W/=&(

 

W

 

 

 

+=2(

2(

 

W'2(

 

 

 

 

 

W/=2(

 

W+=%(

%+(%/(

 

W'%(

 

 

 

 

 

W/=%(

 

'DWD2XWSXW

+LJK,PSHGDQFH

 

2XWSXW'DWD9DOLG

W38

 

 

 

W3'

 

 

 

,&&

6WDQGE\

$FWLYH

 

Figure 8. SRAM Write Cycle #1: WE Controlled[3, 17, 18, 19]

 

 

W:&

 

$GGUHVV

 

$GGUHVV9DOLG

 

 

W6&(

W+$

&(

 

 

 

 

 

W%:

 

%+(%/(

 

 

 

 

 

W$:

 

 

 

W3:(

 

:(

 

W6$

 

 

 

 

 

 

W6'

W+'

'DWD,QSXW

 

 

,QSXW'DWD9DOLG

 

 

W+=:(

W/=:(

'DWD2XWSXW

3UHYLRXV'DWD

+LJK,PSHGDQFH

 

 

Notes

19. CE or WE must be >VIH during address transitions.

Document #: 001-07102 Rev. *L

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Cypress manual CY14B104L, CY14B104N