CY14B104L, CY14B104N
AutoStore/Power Up RECALL
Parameters |
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| Description | CY14B104L/CY14B104N | Unit | |
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| Min | Max | |||
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tHRECALL [20] |
| Power Up RECALL Duration |
| 20 | ms | |
tSTORE [21] |
| STORE Cycle Duration |
| 8 | ms | |
tDELAY [22] |
| Time Allowed to Complete SRAM Cycle | 1 | 70 | μs | |
VSWITCH |
| Low Voltage Trigger Level |
| 2.65 | V | |
tVCCRISE |
| VCC Rise Time | 150 |
| μs | |
VHDIS[13] |
| HSB | Output Driver Disable Voltage |
| 1.9 | V |
tHHHD |
| HSB | High Active Time |
| 500 | ns |
tPURHH |
| HSB | Hold Time after | 70 |
| μs |
tLZHSB |
| HSB | To Output Active Time |
| 5 | μs |
Switching Waveforms
Figure 11. AutoStore or Power Up RECALL[23]
9&& |
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96:,7&+ |
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9+',6 |
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95(6(7 |
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W9&&5,6( | 1RWH | W6725( | 1RWH | W6725( |
+6% | W+++' |
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| W+++' | 1RWH |
287 |
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W385++ |
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| W'(/$< |
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| W/=+6% |
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| W/=+6% |
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$XWR6WRUH |
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32:(583 |
| W'(/$< |
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5(&$// |
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W+5(&$// |
| W+5(&$// |
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5HDG :ULWH |
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,QKLELWHG |
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32:(583 | 5HDG :ULWH | %52:1287 32:(583 | 5HDG :ULWH | 32:(5'2:1 | |
5(&$// |
| $XWR6WRUH | 5(&$// |
| $XWR6WRUH |
Notes
20.tHRECALL starts from the time VCC rises above VSWITCH.
21.If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware Store takes place.
22.On a Hardware STORE, Software STORE/RECALL, AutoStore Enable/Disable and AutoStore initiation, SRAM operation continues to be enabled for time tDELAY.
23.Read and Write cycles are ignored during STORE, RECALL, and while VCC is below VSWITCH.
24.HSB pin is driven HIGH to VCC only by internal 100 kΩ resistor, HSB driver is disabled.
Document #: | Page 12 of 25 |
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