Manuals / Cypress / Computer Equipment / Computer Hardware

Cypress CY14B104L, CY14B104N manual Part Numbering Nomenclature, CY 14 B 104 L - ZS P 20 X C T

Models: CY14B104L CY14B104N

1 25

Download 25 pages 23.94 Kb

Page 18

Image 18

CY14B104L, CY14B104N

Part Numbering Nomenclature

CY 14 B 104 L - ZS P 20 X C T

Option:

T - Tape & Reel

Blank - Std.

Temperature:

C - Commercial (0 to 70°C)

Pb-Free

I - Industrial (–40 to 85°C)

P - 54 Pin

Package:

Blank - 44 Pin

BA - 48 FBGA

ZS - TSOP II

Data Bus:

L - x8

N - x16

Voltage:

B - 3.0V

Speed:

20 - 20 ns

25 - 25 ns

45 - 45 ns

Density: 104 - 4 Mb

NVSRAM

14 - Auto Store + Software Store + Hardware Store

Cypress

Document #: 001-07102 Rev. *L

Page 18 of 25

[+] Feedback

Page 18

Image 18

Cypress manual Part Numbering Nomenclature, CY 14 B 104 L - ZS P 20 X C T, CY14B104L, CY14B104N

Contents

CY14B104L, CY14B104N FeaturesLogic Block Diagram1, 2 Functional DescriptionPinouts Figure 1. Pin Diagram - 48 FBGAFigure 2. Pin Diagram - 44 Pin TSOP 44 - TSOPByte High Enable, Active LOW. Controls DQ15 - DQ8 Figure 3. Pin Diagram - 54 Pin TSOP IIOutput Enable, Active LOW. The active LOW Byte Low Enable, Active LOW. Controls DQ7 - DQ0SRAM Read Figure 4. AutoStore ModeDevice Operation SRAM WritePower Hardware RECALL Power UpTable 1. Mode Selection Software STOREData Protection Table 1. Mode Selection continuedPreventing AutoStore Noise ConsiderationsOperating Range DC Electrical CharacteristicsMaximum Ratings RangeThermal Resistance Data Retention and EnduranceCapacitance AC Test ConditionsParameters AC Switching CharacteristicsSwitching Waveforms 20 nsFigure 8. SRAM Write Cycle #1 WE Controlled3, 17, 18 CY14B104L, CY14B104NFigure 7. SRAM Read Cycle #2 CE and OE Controlled 3, 14 + FeedbackCY14B104L, CY14B104N Figure 9. SRAM Write Cycle #2 CE Controlled 3, 17, 18Figure 10. SRAM Write Cycle #3 BHE and BLE Controlled3, 17, 18 + FeedbackCY14B104L/CY14B104N AutoStore/Power Up RECALLFigure 11. AutoStore or Power Up RECALL23 Switching WaveformsFigure 12. CE and OE Controlled Software STORE/RECALL Cycle26 Figure 13. Autostore Enable / Disable CycleSoftware Controlled STORE/RECALL Cycle Switching WaveformsHardware STORE LOW to STORE Busy Hardware STORE CycleHardware STORE Pulse Width Figure 14. Hardware STORE Cycle21Truth Table For SRAM Operations For x8 ConfigurationFor x16 Configuration Inputs/Outputs2Speed DiagramOrdering Information Ordering CodeCY14B104L, CY14B104N Ordering Information continuedDiagram SpeedPart Numbering Nomenclature CY 14 B 104 L - ZS P 20 X C TCY14B104L, CY14B104N CY14B104L, CY14B104N Package DiagramsFigure 16. 44-Pin TSOP II + FeedbackCY14B104L, CY14B104N Package Diagrams continuedFigure 17. 48-Ball FBGA - 6 mm x 10 mm x 1.2 mm + FeedbackCY14B104L, CY14B104N Figure 18. 54-Pin TSOP IIPackage Diagrams continued Page 21 ofDocument Number Document History PageDocument Title CY14B104L/CY14B104N 4 Mbit 512K x 8/256K x 16 nvSRAM ECN NoDocument Number CY14B104L, CY14B104NDocument Title CY14B104L/CY14B104N 4 Mbit 512K x 8/256K x 16 nvSRAM ECN NoDocument Number CY14B104L, CY14B104NDocument Title CY14B104L/CY14B104N 4 Mbit 512K x 8/256K x 16 nvSRAM ECN NoWorldwide Sales and Design Support Sales, Solutions, and Legal InformationPSoC Solutions Products