Cypress CY7C1163V18 manual Logic Block Diagram CY7C1161V18, Logic Block Diagram CY7C1176V18, Doff

CY7C1161V18, CY7C1176V18

CY7C1163V18, CY7C1165V18

Logic Block Diagram (CY7C1161V18)

					D[7:0]	8
						Address
A(18:0)						Register
				19
			K			CLK
			K
						Gen.
		DOFF
	VREF
	WPS					Control
	NWS					Logic
				[1:0]

	Write	Write	Write		Write
								Address
	Reg	Reg	Reg		Reg			Register
Decode	512K x	512K x	512K x		512K x	Decode
WriteAdd.	8Array	8Array	8Array		8Array	ReadAdd.				Logic
									Control
	Read Data Reg.
			32	16
							Reg.				Reg.
				16
							Reg.

8

19A(18:0)

RPS

CQ

CQ

Q[7:0]

8

QVLD

Logic Block Diagram (CY7C1176V18)

						D[8:0]	9
							Address
A(18:0)							Register
					19
			K				CLK
			K
							Gen.
		DOFF
	VREF
	WPS						Control
	BWS			[0]			Logic

	Write	Write	Write		Write
								Address
	Reg	Reg	Reg		Reg			Register
Decode	512K x	512K x	512K x		512K x	Decode
WriteAdd.	9Array	9Array	9Array		9Array	ReadAdd.				Logic
									Control
	Read Data Reg.
			36	18
							Reg.				Reg.
				18
							Reg.

9

19A(18:0)

RPS

CQ

CQ

Q[8:0]

9

QVLD

Document Number: 001-06582 Rev. *D Page 2 of 29

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